143 results on '"Tripathi, Jai Narayan"'
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2. Prediction of Power Supply Induced Jitter via Deep Belief and Knowledge-Based Neural Networks
3. Analysis of power supply noise in AMS circuits including the effects of interconnects using estimation by inspection method
4. Variability-Aware Modeling of Power Supply Induced Jitter
5. A Semi-Analytical Approach for Variability-Aware Jitter Estimation
6. Modeling Power Supply and Ground-Bounce Induced Jitter for a Voltage-Mode Driver Circuit driving Long Transmission Lines
7. A sub-picosecond resolution jitter instrument for GHz frequencies based on a sub-sampling TDA
8. Decoupling Network Optimization by Swarm Intelligence
9. A harmonic cancellation-based high-frequency on-chip sinusoidal signal generator with calibration using a coarse-fine delay cell
10. Variability-Aware Modeling of Supply Induced Jitter in CMOS Inverters
11. Development of Knowledge-Based Artificial Neural Networks for Analysis of PSIJ in CMOS Inverter Circuits
12. Special Session: A high-frequency sinusoidal signal generation using harmonic cancellation
13. Analytical Modeling of Deterministic Jitter in CMOS Inverters
14. Signal Integrity and Power Integrity
15. On-chip calibration for high-speed harmonic cancellation-based sinusoidal signal generators
16. Blood Pressure Estimation from ECG Data Using XGBoost and ANN for Wearable Devices
17. Efficient Modeling of Random Jitter Due to Stochastic Power Supply Noise in CMOS Inverters
18. Device Parameters Based Analytical Modeling of Ground-Bounce Induced Jitter in CMOS Inverters
19. Design and Distortion Analysis of a Power Delivery Network in the Presence of Internal Supply Noise
20. Hardware Accelerator Design for Healthcare Applications: Review and Perspectives
21. A Machine Learning based Metaheuristic Technique for Decoupling Capacitor Optimization
22. A Radial Basis Function Network-Based Surrogate-Assisted Swarm Intelligence Approach for Fast Optimization of Power Delivery Networks
23. Large-Scale Optimization of Decoupling Capacitors Using Adaptive Region Based Encoding Scheme in Particle Swarm Optimization
24. Uncertainty Quantification of RF Circuits Using Stochastic Collocation Techniques
25. An Automated Framework for Variability Analysis for Integrated Circuits Using Metaheuristics
26. Indefinite Admittance Matrix Based Modelling of PSIJ in Nano-Scale CMOS I/O Drivers
27. Computational Intelligence Based Selection and Placement of Decoupling Capacitors: A Comparative Study
28. Novel Observations and Physical Insights on PSIJ Behavior in CMOS Chain-of-Inverters
29. Estimating Power Supply Induced Jitter using S-Parameter based Modeling of Transmission Media
30. Machine Learning Approaches for Variability Analysis in Integrated Circuits
31. Matrix-Based Evolutionary Approach for Optimization of Decoupling Capacitors
32. Pre-driver Modeling and Jitter Estimation under Power Supply Noise
33. Neural-Network Based Modeling of I/O Buffer Predriver under Power/Ground Supply Voltage Variations
34. A Study on an IBIS-like Model to Ensure Signal/Power Integrity for I/O Drivers
35. Metaheuristic Optimization of Decoupling Capacitors in a Power Delivery Network
36. Uncertainty Quantification of a CMOS Oscillator using Stochastic Collocation Techniques
37. Device Parameter-Based Analytical Modeling of Power Supply Induced Jitter in CMOS Inverters
38. Analytical Modeling of Power Supply Induced Jitter in CMOS Inverters due to Periodic Fluctuations
39. Performance of Crossbar based Long Short Term Memory with Aging Memristors
40. A Swarm Intelligence based Automated Framework for Variability Analysis
41. Modeling Power Supply Induced Jitter in a Voltage-Mode Driver with Long Transmission Lines
42. An Automated Framework for Variability Analysis using Simulated Annealing
43. Uncertainty Quantification of Memristor Crossbar Array for Vector Matrix Multiplication
44. Optimal Design of a Decoupling Network Using Variants of Particle Swarm Optimization Algorithm
45. Efficient Selection and Placement of In-Package Decoupling Capacitors Using Matrix-Based Evolutionary Computation
46. Machine Learning Techniques for Modeling and Performance Analysis of Interconnects
47. An Inspection Based Method to Analyse Deterministic Noise in N-port Circuits
48. A Generalised Approach for Analysing the Impact of Supply Noise in MOS Amplifiers
49. Efficient Jitter Analysis for a Chain of CMOS Inverters
50. Deterministic Noise Analysis for Single-Stage Amplifiers by Extension of Indefinite Admittance Matrix
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