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International audience; In this paper we present a technology for wall shear stress and pressure integrated sensor fabrication. Thanks to the use of SOI wafers and wafer bonding technique, we came up with an innovative technology that provides high on-chip density of sensors required for arrays utilized in numerous microfluidic applications like active control of flow. At the end some wall shear stress results are presented.

This paper proposes, the investigation of the Suspended Gate Field-Effect Transistor (SG-FET) small-slope switch based on a hybrid numerical simulation approach combining ANSYSTM Multiphysics and ISE-DESSISTM in a self-consistent system. The proposed numerical simulations uniquely enable the investigation of the behavior and the physics of complex micro-electro-mechanical/solid-state devices, such as the SG-FET. Abrupt switching as well as the effect of trapped charges in the gate dielectric are demonstrated. The numerical data serve to calibrate an analytical EKV-based SG-FET model, which is then used to design and originally simulate a sub-micron (90 nm) scaled SG-FET complementary inverter. It is shown that, due to abrupt switching in the subthreshold region and electro-mechanical hysteresis, the SG-FET inverter could deliver a significant power saving (1-2 decades reduction of inverter peak current and practically no leakage power) compared to traditional CMOS inverter.

The fabrication, design, and characterization of high-quality factor microelectromechartical (MEM) resonators fabricated on thin-film silicon-on-insulators (SOIs) are addressed in this paper. In particular, we investigate laterally vibrating bulk-mode resonators based on connected parallel beams [parallel beam resonators (PBRs)]. The experimental characteristics of PBRs are compared to disk resonators and rectangular plate resonators. All the reported MEM resonators are fabricated on 1.25-mu m SOI substrates by a hard mask and deep reactive-ion etching process, resulting in transduction gaps smaller than 200 nm. Additionally, this fabrication process allows the growth of a thermal silicon dioxide layer on the resonators, which is used to compensate the resonance-frequency dependence on temperature. Quality factors Q, ranging from 20 000 at 32 MHz up to 100 000 at 24.6 MHz, are experimentally demonstrated. The motional resistances R-m are compared for different designs, and values as low as 55 k Omega at 18 V of bias voltage are obtained with the thin SOI substrate. The thermal sensitivity of the resonance frequency is investigated from 200 K to 360 K, showing values of -15 ppm/K for the PBRs, with a possible compensation of 2 ppm/K when using 20 nm of SiO2.

We report here the fabrication of a sensitive and selective gas sensor using a carbon nanotube (CNT) membrane as the gas sensing transducer. A TiN/Al2O3/TiN stack is used as a support for the CNT growth catalyst, evaporated with a 45° tilt angle on the vertical wall. Thanks to this layout, dense and thin arrays of aligned and horizontal CNTs are grown, both selectively and on-site, in between interdigited electrodes. These features allow better gas limit detection with working conditions close to room temperature and atmospheric pressure. The FET or switch like structure of the sensor allows multiple readouts (conductance, capacitance, resonance) to achieve a better selectivity for gas detection.

This paper presents new results on miniaturized organic thin film transistors (TFT) fabricated on a spin coated polyimide (PI) film. Patterning steps, that are vital for the integrity and electrical performances of the organic TFT, were performed using resistless shadow-mask lithography with two high precision MEMS fabricated stencils, thus avoiding solvents and high temperature processes. Both pentacene and source-drain (S/D) electrodes were directly patterned through stencils with high accuracy on wafer scale. The TFT have been characterized before and after peeling the flexible PI film off the rigid surface, showing full transistor functionality in both cases.

Electronic devices based on organic semiconductors, such as field-effect transistors (OTFTs) and organic diodes have attracted significant interest as possible inexpensive and flexible alternatives to inorganic devices. Despite considerable improvement in technology and in device properties, the sufficient level of reproducibility to insure industrial acceptance of these devices has not yet been reached. This work outlines the possibility of fabrication of various organic, pentacene-based, electronic devices and circuits on a single, flexible chip, using combination of classic photolithography techniques and several levels of full-wafer stencil fabrication methods. The results from the DC and AC characterization of fabricated devices and circuits are comparable to the state of the art and demonstrate the potential of the developed technology. Obtained OFETs show good MOSFET-like behavior in both transfer and output characteristics while reaching low-field mobility as high as µ0 = 0.5 cm2/Vs. Organic diodes present a fully functional rectification ability up to several hundreds of kHz as well as basic logic circuits as p-type inverters. We have demonstrated that the combination of standard photolithography and multi-level stencil lithography is a feasible, cost-effective and reliable fabrication method. In addition, it has been shown that the choice of electrode metals (Au for source and drain, Al for gate) based on their work function significantly improves the contact resistance and rectification properties of organic diodes.