Search

Future consumer terminals will be more and more based on programmable platforms instead of only dedicated hardware. Novel scalable video algorithm (SVA) software modules trade off resource usage against quality of the output signal. SVAs together with a strategy manager and a quality-of-service resource manager (QoS-RM) aim for flexible, robust, and cost-effective media processing in software on programmable architectures. We developed some SVAs including MPEG-2 decoding and image enhancement algorithms and the basic QoS control software to illustrate the power of the overall system. The resource limited hardware is a currently available DSP board with a single dedicated media processor1. The system supports two inputs and several modes for main and picture-in-picture (PiP) window applications, along with background recording.

A complexity scalable algorithm is an algorithm that has several computation scales with gracefully degraded qualities from the original quality. We present the importance of, and the design principles and guidelines for, making a scalable algorithm. We then use a resolution enhancement algorithm as an example and make it scalable. The resulting scalable algorithm has 5 computation scales, consisting of 35%, 31%, 23%, 16%, and 0% of the original optimized computation with very-good quality compared to the non-enhanced quality. This scalable algorithm has many applications in multi-feature multimedia HD (high definition) devices.

This paper presents two novel methods to encode HD (High Definition) video at low bitrates (~5 Mbps) using the MPEG-2 Main Profile@Main Level standard (be compatible with current digital video devices; e.g., DVD players, digital video recorders, etc.) with the embedded HD-relevant information (E-data) in the bitstream. Due to the low bitrate constraint, traditional coding based approaches (e.g., MPEG-2 layered coding or scalable coding) cannot satisfy this requirement. Therefore, we developed our system from the video-enhancement point of view. At first, the HD video is down converted to SD (Standard Definition). During the down-conversion, extra data (E-data) is saved. This E-data is used to re-create HD effects when the encoded SD is upconverted prior to the display. For HD re-creation, we developed a novel multilevel resolution-enhancement method that makes an upconverted image emulate the quality of the original HD picture. Further, we designed a visual-based fine detail injection method to add more details into the picture to achieve near HD quality. Based on several test video sequences, we conclude that our approaches have the potential to create HD visual effect on the upconverted SD video.© (2003) COPYRIGHT SPIE--The International Society for Optical Engineering. Downloading of the abstract is permitted for personal use only.

In this work we describe a simple transform-coefficient sorting algorithm that enhances the performance of image compression techniques. We use multiresolution grids to localize significant pixels and send out pixel values using successive approximation. In the wavelet domain our method performs slightly better than SPIHT (in average 0.1 dB of PSNR). In the DCT domain our method outperforms the SPIHT-based method and the significant tree quantization method by 1 dB. Our approach breaks the dominant role played by the zero tree structure in image coding, and provides a low complexity solution to image compression.

We study the problem of jointly optimizing source/channel/modulation coding to achieve a given quality of service while minimizing the total power consumption of mobiles. This paper emphasizes the design of a robust transmission framework in the context of a total power minimization scheme. We design a simple but efficient transmission scheme which is called multistage coded modulation that combines source/channel (S/C) coding and multirate modulation (MM). We then integrate into this scheme a complexity-scalable video coder to achieve the best trade-offs in multimedia wireless communications between total power, quality of service, and capacity. Preliminary results show superior video frame quality (around 3 dB better than the simple S/C coding scheme) of the proposed system in the severe channel condition, with total power consumption kept to a minimum.

We study how to use the H.263 video communications standard efficiently to save the total consumed energy of a mobile unit in cellular networks. Particularly, we study the computational power dissipation of various operation modes available in the H.263 coding standard. We show how to achieve low power consumption in a mobile unit by judiciously selecting the operating mode of H.263 in response to the mobile environment changes (e.g., slow fading and path loss), while maintaining a good video quality level. Our preliminary results show that a mobile with the proposed method consumes 10% less energy than a mobile that comes with the most efficient power-rate mode (with a search window size of 8) of H.263 video coding in one-hour mobile communication simulation. It even saves around 32% energy over a mobile operating with an advanced coding method (using four negotiating options).

In this paper, we introduce a novel approach for adaptive minimization of the total energy consumption in multimedia wireless communications subject to achieving a given quality of service. Our approach exploits trade-offs between the effects of energy consumed in processing (source and channel coding) and energy consumed in transmission under different noise and channel conditions, on the received quality of the multimedia. We present several simulation results involving image transmission that illustrate the energy consumption savings that can be achieved using our proposed approach.

Current implementations of real-time video decoders employ hard-decoding without run-time computation regulation. The result is fluctuation in the video decoding time that requires over-specified dedicated hardware or general-purpose processors to guarantee real-time performance. We propose a computation regulation system for MPEG-2 video decoding on media processors that obviates over-engineering while maintaining real-time performance and video quality. Our computation regulation scheme consists of dynamic complexity prediction and control. The complexity prediction algorithm takes implementation issues specific to media processors into account and yields accurate prediction results that correlate with actual measurements to 97%. The predicted complexity is then used as a control signal to adjust the decoding algorithm so that peaks in computation load are suppressed. Simulation results show that our system can lower the overall CPU cycle budget by a large factor (25%) with very little degradation in video quality.

We present a novel algorithm for high capacity data embedding. The proposed algorithm gives high hiding ratios up to 1/13 (1 embedded bit out of 13 raw image pixels) subject to JPEG compression with quality factor equals 75. With such high capacity, one can easily embed some important regions of an image inside the image itself with very small perceptual distortion. In the proposed algorithm, the DCT coefficients of 8/spl times/8 blocks are first rearranged using Hilbert curves. Data is embedded using projections on a random orthogonal set. The algorithm recovers the embedded data without any reference to the original image, with very low BER (around 0.1%). Finally, the proposed algorithm shows robustness to JPEG compression.

Video decoding at reduced resolution with resizing embedded in the decoding loop saves computational resources such as memory, memory bandwidth and CPU cycles. Key to such embedded resizing is proper filtering/scaling of DCT data, and motion compensation at the reduced resolution. Although MPEG-2 video decoding with embedded resizing has been investigated in the past, little work has been reported on solving problems associated with interlaced video undergoing decoding with embedded resizing. In particular, annoying artifacts may occur in moving areas of interlaced video due to improper scaling or motion compensation. In this paper, we introduce the notion of the Local Interlacing Property for interlaced moving areas and propose algorithms to detect and process data with the Local Interlacing Property properly in the context of decoding with embedded resizing. Specifically, we demonstrate that 1) vertical high frequency in interlaced moving areas should be preserved during downscaling, and 2) phase shift must be added for motion compensation in interlaced moving areas under certain circumstances. Experimental results show that our method effectively removes artifacts in interlaced moving areas, making MPEG-2 video decoding with embedded resizing a practical tradeoff for interlaced video.