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A quantitative model which relates the SOI (silicon-on-insulator) MOSFET breakdown voltage to key parameters such as channel length, SOI film thickness, and gate voltage is presented. The SOI breakdown is caused by electron impact ionization current produced near the drain which is subsequently amplified by a parasitic lateral bipolar transition. This model is based on analytic modeling, quasi-2-D simulation and experimental study of the maximum drain electric field in SOI, and a novel method for measuring the lateral BJT (bipolar junction transistor) current gain beta using GIDL (gate-induced drain leakage) current. It can accurately model the breakdown voltage within 0.2 V for different channel lengths, gate voltages, and SOI film thicknesses. >

Width dependence of SIMOX SOI MOSFETs characteristics are studied. Drain current kinks and subthreshold current humps are found to be dependent on channel width and they are related to the physical shape of the SOI film. It is found that they are the results of thinning of SOI film edge due to LOCOS isolation. The shorter channel width devices are fully depleted while the longer channel width device are not fully depleted. A model is proposed to explain the effects of field-edge transistor in SOI MOSFETs. >

Evidence suggests that MOSFET degradation is due to interface-states generation by electrons having 3.7 eV and higher energies. This critical energy and the observed time dependence is explained with physical model involving the breaking of the ≡ Si s H bonds. The device lifetime τ is proportional to I_{sub}^{-2.9}I_{d}^{1.9}\Delta V_{t}^{1.5} . If I sub is large because of small L or large V d , etc., τ will be small. I sub (and possibly light emission) is thus a powerful predictor of τ. The proportionality constant has been found to vary by a factor of 100 for different technologies, offering hope for substantially better reliability through future improvements in dielectric /interface technologies. A simple physical model can relate the channel field E m to all the device parameters and bias voltages. Its use in interpreting and guiding hot-electron scaling are described. LDD structures can reduce E m and I sub and, when properly designed, reduce device degradation.

Evidence suggests that MOSFET degradation is due to interface-states generation by electrons having 3.7 eV and higher energies. This critical energy and the observed time dependence is explained with a physical model involving the breaking of the = Si/sub s/H bonds. The device lifetime /spl tau/ is proportional to...

New Energy- Dependent Soft X -Ray Damage in MOS DevicesTung -Yi Chan, Henry Gaw, Daniel SeligsonIntel Corporation, SC2 -253065 Bowers AvenueSanta Clara, CA 95051Lawrence Pan, Paul L. King, and Piero PianettaStanford Synchrotron Radiation LaboratorySLAC /SSRL Bin 69, P.O. Box 4349Stanford, CA 94305AbstractAn energy- dependent soft x- ray- induced device damage has been discovered in MOSdevices fabricated using standard CMOS process. MOS devices were irradiated bymonochromatic x -rays in energy range just above and below the silicon K -edge (1.84keV). Photons below the K -edge is found to create more damage in the oxide andoxide /silicon interface than photons above the K -edge. This energy- dependent damageeffect is believed to be due to charge traps generated during device fabrication. Itis found that data for both n- and p -type devices lie along a universal curve ifnormalized threshold voltage shifts are plotted against absorbed dose in the oxide.The threshold voltage shift saturates when the absorbed dose in the oxide exceeds1.4X105 mJ /cm3, corresponding to 6 Mrad in the oxide.Using isochronal anneals, the trapped charge damage is found to recover with anactivation energy of 0.38 eV. A discrete radiation - induced damage state appears inthe low frequency C -V curve in a temperature range from 175 0C to 325 °C.I. IntroductionX -ray lithography is likely to displace optical lithography for semiconductordevice fabrication with dimensions < 0.4 um. Since x -ray photons have energies muchhigher than the band gap of silicon dioxide (about 9 eV), oxide damage caused by x-ray irradiation may be a serious concern in the application of x -ray lithography. Theeffects of x -rays and other forms of ionizing radiation on MOS structures have beenextensively studied for years [1 -4]. However, little work has been done to examinethe effect of varying the incident x -ray energy [5].In this paper, synchrotron x -ray sources were used to study the effect of x-rayenergy on radiation - induced device damage. X -ray photons studied have energy justabove and just below the silicon K -edge (1.84 keV). An energy- dependent soft