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A thin-film CMOS MEMS thermal sensor has been designed, fabricated and tested with the addition of through-membrane isolating holes. These holes have been shown to enhance the discrimination towards gases with differing thermal conductivity in the presence of flow. Using three on-membrane resistors as inputs, linear statistical methods alongside Artificial Neural Network pattern recognition techniques have been investigated for decoupling the two parameters of thermal conductivity and flow rate using a single sensor. In addition to this, the addition of the membrane holes increases the sensitivity towards flow rate by 10 times and the sensitivity towards thermal conductivity by 2 times. This sensor design coupled with well-known post-processing techniques will enable a new generation of multi-parameter sensing solutions.

We propose a numerical model for efficient design and optimization of a novel infrared (IR) detector array, fabricated on a single micro-electro-mechanical system (MEMS) membrane based on silicon on insulator (SOI) technology. The model is based on a finite element method (FEM) and is used to investigate the effect of heat transfer, at pixel scale, on the thermopile array’s responsivity and crosstalk performance. We show that optimal operational conditions can be achieved by modifying a combination of design elements, including the pixel size, the interpixel metal heatsinking tracks, as well as the insertion of air gaps between pixels. We find that the combined effect of copper heatsinking tracks and that of air gaps can reduce pixel crosstalk by 65% while increasing the responsivity by 6.4%. The model improves our understanding of the thermal effects in these devices, and can serve as a design tool for a growing number of low-cost industrial and consumer applications.

This letter presents the dual implant superjunction (SJ) trench reverse-conducting (RC) insulated-gate bipolar transistor (IGBT) concept with two implanted SJ pillars in the drift region: one from the cathode side and another from the anode side. The proposed device is compatible with current manufacturing processes and enables a full SJ structure to be achieved in a 1.2-kV device, as alignment between the pillars is not required. Extensive technology computer aided design (TCAD) simulations have been performed and demonstrated that utilizing this dual implantation technique can result in a 77% reduction in turn-off losses for the full SJ structure, compared to a conventional RC-IGBT. The results show that any snapback in the ON-state waveform significantly increases the turn-off losses and only a deep SJ device (pillar $\text {gap} ) warrants the additional processing expense.

The reverse-conducting insulated gate bipolar transistor (RC-IGBT) has several benefits over a separate IGBT and diode solution and has the potential to become the dominant device within many power electronic applications; including, but not limited to, motor control, resonant converters, and switch-mode power supplies. However, the device inherently suffers from many undesirable design tradeoffs which have prevented its widespread use. One of the most critical issues is the snapback seen in the forward conduction characteristic which can prevent full turn-on of the device and result in the device becoming unsuitable for parallel operation (required in many high voltage modules). This phenomenon can be suppressed but at the expense of the reverse conduction performance. This paper provides an overview of the technical design challenges presented by the RC-IGBT structure and reviews alternative device concepts which have been proposed in literature. Analysis shows that these alternate concepts either present a tradeoff in performance characteristics, an inability to be manufactured, or a requirement for a custom gate drive.

The incomplete ionization of impurity atoms affects the free carrier concentration of several wide-bandgap (WBG) semiconductor materials even at room temperature, thus modifying the electrical properties of power devices. In this paper, the influence of the partial ionization of the dopants on the static and dynamic behaviors of WBG semiconductor-based superjunction (SJ) devices has been numerically investigated through extensive 2-D finite-element simulations. While this physical effect has only a minor impact on the static device characteristics, if a reverse bias pulse with a rise time comparable or smaller than the ionization time constant is applied to the structure, a “dynamic ionization” phenomenon can take place. The onset of this time-dependent ionization is the cause of charge unbalance effects in the device structure, due to the temporal dependence of the activated number of dopants. Electrothermal simulations, which have been carried out for a 4H-silicon carbide SJ diode, show a nonuniform temperature distribution during the transients which leads, in turn, to the self-heating of the device. Through an accurate redesign of the cross-sectional view of the device, the drawbacks of the incomplete ionization have been mitigated and the device performance enhanced.

Nanostructured metal oxide semiconductors have been widely investigated and are commonly used in gas sensing structures. After a brief review which will be focused on chemiresistive oxygen sensing employing this type of sensing materials, for both room temperature and harsh environment applications (particularly, at high ambient temperature and high relative humidity levels), paper reports new results concerning O2detection of a structure using a sensing layer comprising nanostructured (typical grain size of 50 nm) SrTi0.6Fe0.4O2.8(STFO40), synthesized by sonochemical methods, mixed with single wall carbon nanotubes. The structure is a Microelectromechanical System (MEMS), based on a Silicon-on-Insulator (SOI), Complementary Metal-Oxide-Semiconductor (CMOS)-compatible micro-hotplate, comprising a tungsten heater which allows an excellent control of the sensing layer working temperature. Oxygen detection tests were performed in both dry (RH = 0%) and humid (RH = 60%) nitrogen atmosphere, varying oxygen concentrations between 1% and 20% (v/v), at a constant heater temperature of 650 °C.

Predictions on limits of silicon in power devices have failed spectacularly in the past, but in spite of that, the theory that generated them is still used today and adapted for wide bandgap materials to justify their superior standing against silicon. The superjunction MOSFET was the first device to break by more than one order of magnitude the so-called ‘limit of silicon’ above 600V. The current theory of superjunction seems however to define a new technology based limit rather than a material based only limit. This implies that by scaling down the dimensions, in particular the cell pitch, the on-state resistances can continually decrease by several orders of magnitude, without a boundary. This paper shows that the down scaling of the cell dimensions cannot happen indefinitely and there is a material dependent intrinsic limit for any power device, which no longer is limited by the geometry or the technology available. Using an analytical approach, and backed up by advanced numerical simulations, we show that the minimum cell pitch is 0.18 μm for silicon and 0.05 μm for 4H-silicon-carbide, and further reduction in the cell pitch would result in an increase in the specific resistance. Finally, a new figure of merit for a superjunction MOSFET based on a rigorous 2D analysis is defined