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Shallow junction complementary metal oxide semiconductor (CMOS) structures (0.25 and 0.35 μm depth) were studied using sputter deposited Ti/TiN/AlSiCu and Ti/TiN/AlCu films for contact metallization. Single contact Van de Pauw patterns (to measure the breakdown voltage) as well as large junction area structures with multiple contact windows were used for electrical measurements. An increase in the RTA temperature used to silicide the contacts increased the Si consumption in the junctions and resulted in degradation of junctions yields. The thickness of the Ti layer had a larger influence on the stability of the junction than the thickness of the TiN layer (in the range of thicknesses studied). AlSi(0.75 wt%)Cu(0.5 wt%) films are more stable than AlCu(0.5 wt%) films for junction spiking. The AlCu films are more reactive, and the interdiffusion of Ti into the AlCu films makes the junctions less stable. The annealing temperature and post wafer fabrication is critical in maintaining stability of junctions. The junction depths, and dopants (BF 2 - p - and As n -implanted) used in forming the junctions affect the breakdown voltages and junction yields. The BF 2 implanted junctions are more stable than arsenic implanted junctions.

High dose, low energy (4×10 15 cm −2 at 15 keV) arsenic ion implantation into silicon was performed in batch and single wafer mode using medium and high current ion implanters. An investigation of implanted and annealed samples by Rutherford backscattering (RBS), transmission electron microscopy (TEM), thermal wave technique, and sheet resistance mapping showed little to no difference of arsenic profiles and residual damage between batch and single wafer implantation conditions when the sample temperature during implantation was kept below 120° C.

It has been shown by earlier workers1that when AISI 4340 steel is quenched from 1200°C, the martensite formed exhibits packets of laths containing dislocations and auto-tempered ∊-carbide inside the laths and thin films of stabilized austenite retained between the parallel lath interfaces. In the present report, we present TEM observations made on specimens of AISI 4340 steel which were step-quenched and then tempered. The heat treatment was: 1200°C/1 hr→ 1100°C/1 hr→ oil quench —tempered at 200° C/l hr. Electron transparent samples were prepared by double jet electropolishing using standard solutions and the thin foils were observed at 100KV in a Hitachi HU 11B electron microscope. Figures 1 and 2 show the microstructures obtained from these samples. One can discern the presence of lath martensite A as well as "blocky" martensite B in these two micrographs. The blocky martensite was mainly observed adjacent to prior austenite grain boundaries.

Recent developments in the fabrication of high performance GaAs devices impose crucial requirements of low resistance ohmic contacts with excellent contact properties such as, thermal stability, contact resistivity, contact depth, Schottky barrier height etc. The nature of the interface plays an important role in the stability of the contacts due to problems associated with interdiffusion and compound formation at the interface during device fabrication. Contacts of pure metal thin films on GaAs are not desirable due to the presence of the native oxide and surface defects at the interface. Nickel has been used as a contact metal on GaAs and has been found to be reactive at low temperatures. Formation Of Ni2 GaAs at 200 - 350C is reported and is found to grow epitaxially on (001) and on (111) GaAs, but is shown to be unstable at 450C. This paper reports the investigations carried out to understand the microstructure, nature of the interface and composition of sputter deposited and annealed (at different temperatures) Ni-Sb ohmic contacts on GaAs by TEM. Attempts were made to correlate the electrical properties of the films such as the sheet resistance and contact resistance, with the microstructure. The observations are corroborated by Scanning Auger Microprobe (SAM) investigations.