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The acceleration of Deep Neural Networks (DNNs) has attracted much attention in research. Many critical real-time applications benefit from DNN accelerators but are limited by their compute-intensive nature. This work introduces an accelerator for Convolutional Neural Network (CNN) , based on a hybrid optoelectronic computing architecture and residue number system (RNS) . The RNS reduces the optical critical path and lowers the power requirements. In addition, the wavelength division multiplexing (WDM) allows high-speed operation at the system level by enabling high-level parallelism. The proposed RNS compute modules use one-hot encoding, and thus enable fast switching between the electrical and optical domains. We propose a new architecture that combines residue electrical adders and optical multipliers as the matrix-vector multiplication unit. Moreover, we enhance the implementation of different CNN computational kernels using WDM-enabled RNS based integrated photonics. The area and power efficiency of the proposed accelerator are 0.39 TOPS/s/mm 2 and 3.22 TOPS/s/W, respectively. In terms of computation capability, the proposed chip is 12.7× and 4.02× better than other optical implementation and memristor implementation, respectively. Our experimental evaluation using DNN benchmarks illustrates that our architecture can perform on average more than 72 times faster than GPU under the same power budget.

Machine learning and artificial intelligence (AI) is becoming a ubiquitous technology of the looming industry-4.0 era. However, progress of adopting intelligent automation of systems is limited by hardware overhead such as throughput, power consumption, and latency. At a conceptual level, electronics is at the end of its scaling law and alternative accelerators are sought after. Optical co-processors offer a high-degree of algorithmic homomorphism to implement general matrix-matrix multiplication operations via on-the-fly multiplication performed by electro-optic components, and accumulation operations performed by photodetectors. However, recent emerging photonic AI engines are cumbersome to program, follow overhead-heavy scaling laws, or rely on discretely-packaged photonic components, all reducing performance. Here we introduce a photonic tensor core processor featuring a complete chip-integrated multiply-accumulate engine on the photonic circuits, signal parallelism via wavelength division multiplexing, and tunable 5-bit electronic programmable weights, all integrated into a small-formfactor silicon photonics platform. This approach shows a high throughput-efficiency AI engine (0.21 TOPS/W). Using this stand-alone hybrid photonic-electronic machine learning accelerator, we demonstrate versatile applications including low-error image filtering and edge detection, augmented reality, and high-accuracy machine learning image classification tasks. This hybrid electronic-photonic tensor processor offers a versatile low-overhead and compact formfactor solution for extreme edge AI applications, but also can be utilized for in-cloud machine learning training tasks.

The retention-of-state functionality provided by memories is fundamental to any Turing machine and neural network, hence is critical for any information system today. While emerging optical machine learning accelerators and photonic neuromorphic computing paradigms provide promising signal processing and computing performance, the lack of a photon-photon force in the universe makes storing optical information challenging. Fortunately, phase change materials provide such a missing memristive nonvolatile function via their reconfigurable crystalline structure and allow for rapid optical READ paradigms. However, demonstrations of photonic memory are limited by high optical loss, low state-cyclability, and rely on cumbersome non-CMOS like optical programmability. To overcome all three shortcomings and unlock the full potential of optical information storage and access, here we introduce a photonic random-access memory featuring vanishing low optical loss, demonstrate more than half a million switching cycles, a 100x improvement over state-of-art, and realize electrical programmability on-chip. The exceedingly low optical absorption (0.0015 dB/μm) is achieved via a novel broadband transparent phase change material, Ge2Sb2Se5 integrated atop a nanophotonic waveguide of a silicon chip. We show a highly efficient signal modulation (0.2 dB/μm) achieved by realizing a newly designed paired micro-heaters along both sides of waveguide, which allows for electronic-standard programmability of these photonic memories. When interrogated by an optical beam, they offer picosecond-short memory READ latency. Furthermore, we demonstrate a partial amorphization scheme realizing multi-state memory levels on a single heater enhancing footprint efficiency. Lastly, we verify the energy and switching speed and show how each trades-off with heater-to-waveguide proximity and signal strength, respectively. Such as CMOS-near electronically programmed and optical read photonic random-access memory with low-optical loss yet efficient programmability can become a crucial building block for network edge AI system of the looming industry 4.0 era.

Non-linear and bistable optical systems are a key enabling technology for the next generation optical networks and photonic neural systems with many potential applications in optical logic and information processing. Here, we propose a novel bistable resonator-free all-optical waveguide device based on indium tin oxide as nonlinear epsilon-near-zero material providing a cost-efficient and high-performance binarity photonic platform. The salient features of the proposed device are compatibility with silicon photonics, enabling sub-picosecond operation speeds with moderate switching power. The device can act as an optical analogue of memristor or thyristor and can become an enabling element of photonic neural networks not requiring OEO conversions., Comment: 9 pages, 5 figures