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The precipitation of secondary phases, the austenite grain growth and their effects on the mechanical properties of the HR3C heat-resistant steel in long-term service at 605 °C in an ultra-supercritical power generation unit were investigated. The results show that during the service period of the HR3C steel, the precipitation of M23C6 (M=Cr, Fe, Ni and Mo) follows the Kurdjumov–Sachs orientation relationship. Polygonal M23C6 particles preferentially precipitate and continuously distribute at the austenite grain boundaries. Meanwhile, the nanoscale NbCrN particles precipitate on the dislocations in the austenite grains. The austenite grain growth occurs in three stages with a growth exponent of 5.92 in the third stage, indicating that it is strongly restrained by the precipitates. In the as-served HR3C steel, the precipitation of the secondary phases, rather than the austenite grain growth, results in the strong improvement of the strength and hardness, albeit at the expense of a clear degradation of the toughness and plasticity.

Cu/Al laminar composite was prepared by dipping Zn layer and then electroplating Cu thick layer on pure Al sheet. During annealing the Cu/Al composites at temperature from 473 to 673 K, the Cu/Al interfacial diffusion and reaction and its kinetics and also the electrical resistivity of the composites were studied. The results show that no Cu–Al IMC layer is observable as the composites are annealed at 473 K for time till 360 h, indicating that the Zn intermediate layer can effectively suppress the Cu/Al interfacial diffusion. However, as the composites are annealed at 573 K and above, Zn atoms in the Zn layer dissolve into the Cu layer. Tri-layered reaction product of CuAl 2 /CuAl/Cu 9 Al 4 then forms from the Al side to the Cu side. The IMC layer follows the diffusion-controlled growth kinetics. Electrical resistivity of the Cu/Al composites increases with the increase of the annealing temperature and time.

International audience; This paper addresses the modeling, at a high level of abstraction, of the functionality and Signal Integrity (SI) performances in a high frequency Point-to-Point connections (P2P) system. Our model is a unique platform, which includes a functional module and a non-functional module. The functional module represents the operative behavior of the P2P system and the non-functional module, based on neural network techniques, displays the SI characteristics. Our method was demonstrated by modeling a P2P of a Universal Serial Bus 3.0 (USB 3.0) system and it was applied to the prediction of transient waveforms and eye diagrams.

International audience; The paper presents a new method for modeling the functionality and Signal Integrity (SI) performances of bus communications at a high level of abstraction. Using neural networks, we build a SystemC/SystemC-AMS virtual platform that combines functional modules, which represent the operative behavior of the system, and non-functional modules based on neural network approximation, which display the systems SI characteristics. Our method was demonstrated by modeling a Universal Serial Bus 3.0 (USB 3.0) system and was applied to the prediction of transient waveforms and eye diagrams. Compared to a HSPICE simulation, our method achieves excellent accuracy (mean absolute error of 1%) with a much shorter simulation time (×6000 speedup).

As a result of continuing growth of electronic technology, signal integrity analysis has now become a more and more critical challenge in the electronic systems design process. To address this issue, designers have introduced several approaches. However, due to the higher heterogeneity of modern applications, along with time-to-market constraints, a new modeling methodology is required to provide the system?s signal integrity performance at a high-level of abstraction. Moreover, it should be easily interoperable with the system?s functional model. The aim of this work is to propose a new modeling methodology for signal integrity analysis that can meet these requirements. Our method is based on the combination of two kinds of blocks, named functional blocks and non-functional blocks. They are built in C/C++ or SystemC/SystemC-AMS, in order to be easily simulated in a single environment. The functional block is used to model the ideal behavior of the system. The non-functional block is used to represent the highly nonlinear and non-ideal behaviors, caused by signal integrity issues. In the non-functional block, neural networks are used to model these non-ideal behaviors. To validate our method, we developed two applications based on I2C and USB 3.0 applications. Our method greatly increases simulation speed (99% faster than a SPICE model), while achieving a relative absolute error around 3%. Finally, our method is a flexible and modular approach since models can easily be parameterized and interoperable. In the future, this original method for high-level modeling of signal integrity could be integrated in the forthcoming design flows of cyber-physical systems., En raison de l'évolution technologique, l'analyse de l'intégrité du signal est devenue de plus en plus critique dans la conception des systèmes électroniques. Plusieurs méthodes d'analyse ont été proposées et sont utilisées. Cependant, l'hétérogénéité croissante des systèmes et la réduction du temps de mise sur le marché des applications font que les concepteurs ont besoin de nouvelles méthodes travaillant à haut niveau d'abstraction, afin qu'elles puissent être intégrées facilement à un modèle au niveau système de l'application, et ainsi analyser l'intégrité du signal au plus tôt dans le cycle de conception. Dans cette thèse, nous proposons une méthode basée sur deux types de blocs complémentaires, nommés blocs fonctionnels et blocs non-fonctionnels, décrits à l'aide d'un même langage (C/C++ et SystemC/SystemC-AMS), et donc aisément simulables dans un unique environnement. Les blocs fonctionnels servent à modéliser les comportements idéaux du système. Les comportements non-idéaux, engendrés par les problèmes d'intégrité du signal, sont modélisés dans les blocs non-fonctionnels à l'aide de réseaux de neurones. Pour valider notre méthodologie, deux applications autour des bus I2C et USB 3.0 ont été modélisées. Les résultats de simulations démontrent la faisabilité de notre méthodologie. En la comparant à des modèles de référence, notre méthode permet de réduire de façon remarquable le temps de simulation (99% par rapport à un modèle SPICE) et l'écart moyen est d'environ 3%. Notre méthode offre enfin certaines possibilités de flexibilité et de modularité. Dans le futur, cette méthode originale pourra être intégrée au flot de conception de systèmes cyber-physiques.

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