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Cascaded H‐bridge rectifier (CHBR) is widely used in high‐power fields such as STATCOM and power electric traction transformer (PETT) due to its high efficiency and easy expandability. With the high‐reliability operation requirements of power equipment, the fault‐tolerance capability has gradually become a research hotspot nowadays. In order to improve the reliability of the power supply, cascaded H‐bridge rectifier should restore as soon as possible after a fault. However, the traditional fault‐tolerant strategies have a great effect on the grid side and a long recovery time. This paper proposed a quasi‐hot standby fault‐tolerant control strategy. Compared with the traditional strategies, the quasi‐hot standby fault‐tolerant control strategy has a faster recovery speed after the malfunction, and its transient recovery process has less impact on the power grid. Simulation and experiment results show the effectiveness and good recovery performance of the proposed fault‐tolerant control strategy. [ABSTRACT FROM AUTHOR]

When a fault occurs on the dc side of the voltage source converter based high voltage direct current (VSC-HVDC) transmission system, the fault current rises quickly due to the low damping of the dc system. Using a dc fault current limiter (DC-FCL) to limit the rise of the fault current can significantly reduce the breaking requirements of the DCCB. A topology of a bidirectional active dc fault current limiter (BA-FCL) based on coupled inductor is proposed in this paper. No expensive full-controlled power electronic devices are used in this topology. Only a few half-controlled power electronic devices are used to achieve active control of the current limiting unit. Compared with many topologies of current limiter at present, the fault current limiting effect of BA-FCL is improved significantly while the cost, volume, topology complexity, and control complexity are reduced. The stress analysis and parameter design of the proposed current limiter are carried out. Finally, the simulation case study and hardware experiment are implemented to verify the good economy and current limiting performance of the proposed topology. [ABSTRACT FROM AUTHOR]

It has been widely accepted to apply dc circuit breakers (DCCBs) to protect dc grids. Nevertheless, existing DCCBs have one or more following limitations: insulation recovery scheme of mechanical switch, additional precharge power supply, high conduction loss, unreliable current-breaking process, and unidirectional design. In this letter, a new DCCB with low conduction loss, simple precharging scheme, and reliable breaking ability is proposed. The proposed DCCB could break both fault and operating current actively with the same simple operation sequences. Moreover, bidirectional topology possessing all advantages mentioned previously is also presented. Topology introduction, parameters designing, and scaled-down experiment of the proposed DCCB are all presented in the letter. [ABSTRACT FROM AUTHOR]

• An accurate admittance model for the grid-connected converter with droop control is proposed. • The frequency coupling phenomenon is induced by the asymmetry of the droop controller for the grid-connected converter. • The outer control loop will impact the frequency-coupled phenomenon, but has slight effects on positive and negative sequence admittance of VSCs. • The proportional gain of the current control loop impacts obviously the frequency coupling phenomenon. The droop control scheme is widely applied for the paralleled operation of the grid-connected converter. Yet, the frequency-domain admittance model for the grid-connected converter with droop control is still inaccurate due to the complex coupling relation of the droop control loop, the voltage control loop, and the current control loop. To address this problem, the coupling relationship of these control loops is analyzed in this paper, and then an accurate admittance model for the grid-connected converter with droop control is proposed based on the complex vector modeling method in both dq -frame and αβ -frame. The influence of different control parameters on the admittance model is analyzed further. The proposed model accurately describes the admittance characteristics of the grid-connected converter with droop control, and reveals the frequency coupling phenomenon caused by the droop control loop. The frequency response measured by frequency scan and simulation results verify the effectiveness of the established model. Finally, the impedance interactive stability analysis results show that the grid-connected converter with droop control is prone to instability in stiff grid conditions. © 2017 Elsevier Inc. All rights reserved. [ABSTRACT FROM AUTHOR]

This article focuses on the modeling and stability analysis of the typical single-phase phase-locked loop (PLL) based on second-order generalized integrator (SOGI). Traditionally, SOGI-based PLL (SOGI-PLL) is linearized as the linear time-invariant (LTI) model for the stability analysis and parameter design. Yet, the PLL has periodical nature due to the periodical variation of the grid voltage. The traditional LTI model for PLL thereby reduces the precision of stability analysis. For addressing this problem, an accurate linear time-periodic (LTP) model of the single-phase SOGI-PLL is proposed in this article. The proposed model can precisely characterize the coupling nature of phase, frequency, and amplitude estimated by SOGI-PLL. A precise stability region of SOGI-PLL, thereby, can be derived from the proposed LTP model. The effectiveness of the proposed LTP model for SOGI-PLL is verified by simulation and experimental tests. [ABSTRACT FROM AUTHOR]

For N-cells cascaded H-bridge (CHB) inverters based on unipolar double frequency phase-shifted pulsewidth modulation (PS-PWM), the output voltage is distorted and its harmonics are difficult to be suppressed under unbalanced conditions (different dc voltages and/or modulation indices). This article proposes a closed-loop harmonic suppression scheme based on the PS-PWM, and the scheme is easily implemented in the dq frame to adaptively adjust the displacement angles of the triangular carriers. The harmonic content can be suppressed to its possible minimum value without the limitation of the operational point by the proposed method. The adjustment rules of displacement angles and the harmonic suppression principle are presented in detail. This method can effectively restrain harmonic magnitudes without the limitation of the cells number and does not require complicated trigonometric function calculations or optimization algorithms. Moreover, the principle of symmetrical sideband harmonic suppression is also discussed. The effectiveness of the proposed method is verified by a downscale test platform of the single-phase CHB inverter. [ABSTRACT FROM AUTHOR]

• The proposed space vector modulation (SVM) method for active power decoupling quasi-Z-source inverter (APD-qZSI) is easy to implement. • Compared with the SPWM, the proposed SVM method has smaller storage capacitance and a wider normal operation range. • The APD method under the proposed SVM method is effective for suppressing the 2ω ripple power and reducing the qZS inductance and capacitance. The double-line frequency ripple power of the single-phase quasi-Z source inverter (qZSI) will result in a large designed qZS impedance on the dc side, which can be greatly reduced by the coupled-type active power decoupling (APD) method. However, the traditional sinusoidal pulse width modulation (SPWM) for the APD-qZSI needs extravagant APD storage capacitance and may cause abnormal operation under low load conditions. Classical space vector modulation (SVM) has higher flexibility and dc-link voltage utilization, but it cannot be directly applied to the APD-qZSI. In this paper, a simplified SVM method for the coupled-type APD-qZSI is proposed, where the switching time sequence is transformed to carrier-based pulse width modulation, so the shoot-through control of the qZSI is easy to implement. Next, the passive component parameters and normal operation range of the traditional SPWM and the proposed SVM are analyzed and compared. The proposed SVM has a smaller APD storage capacitance but a slightly larger ac side filter inductance. In addition, the decreased current of the APD branch under SVM can help suppress the abnormal operation of the inverter, so the APD-qZSI can operate at a lower load condition. Finally, experimental results validate the effectiveness and superiority of the proposed SVM method. [ABSTRACT FROM AUTHOR]

Many methods have been studied to balance the capacitor voltage of the cascaded H-bridge rectifier (CHBR). However, these balancing control methods will fail while the difference of the dc-load connected in each cell exceeds the operating limitation. Therefore, it is necessary to analyze and optimize the limitation of the balancing control quantitatively to avoid the failure of the control system. In this article, the voltage balancing limitation (VBL) is quantitatively derived and the stable operation region (SOR) is analyzed. Moreover, essential factors affecting the balancing ability are screened out. Then, the VBL and balancing dynamics of two typical methods are elaborated. And three novel methods (Methods 1–3) are proposed to improve the balancing dynamics and extend the VBL. The effects of the five methods are compared. Finally, the correctness and effectiveness of the theoretical calculation and optimization methods of VBL are verified by the simulation and experimental tests. The work of this article can provide a theoretical reference for the system parameter design of CHBR and the alternative control scheme under extreme load conditions. [ABSTRACT FROM AUTHOR]

The feature of the modular multilevel converter (MMC) may worse the power quality, due to the additional harmonics caused by the harmonic coupling between the grid and the dc bus. It is difficult to analyze the influencing factors of harmonic coupling in MMC, since harmonic coupling processes are complicated. In this article, the mechanism of harmonic coupling of the MMC is analyzed first, considering that harmonics exist in the grid and dc side. The influencing factors of harmonic coupling are analyzed based on the harmonic coupling. The reference for the filter and MMC design, and the evaluation of the harmonic pollution can be provided by the analysis in this article. The correctness of the influencing factors has been proved by simulation and experimental tests. [ABSTRACT FROM AUTHOR]

SCR-based solid-state dc circuit breaker (SCR-DCCB) topologies have been widely studied for replacing the traditional expensive insulated-gate bipolar transistor (IGBT) based DCCB. Yet, the existing SCR-DCCB cannot be actively turned-off since SCR is a half-controlled device. In this letter, an active Z-source DCCB (AZ-DCCB) is proposed by the combination of IGBT and SCR. The proposed AZ-DCCB has advantages of simple and compact topology, economical design, low conduction losses, and active and bidirectional current breaking capacity. The operation process of the proposed AZ-DCCB is discussed in detail, and the designing principle of circuit parameters is also presented. Experimental results verified the effectiveness of the proposed AZ-DCCB. [ABSTRACT FROM AUTHOR]

The high-order harmonics caused by the modulation strategy can deteriorate power quality. The harmonic characteristics of the carrier-based pulsewidth modulation are relatively fixed and difficult to optimize, while space vector pulsewidth modulation (SVPWM) has more flexibility. The unified SVPWM design method for single-phase three-level neutral-point clamped (NPC) converters is fully presented in this article. Based on the proposed unified SVPWM method, two existing traditional vector sequences are designed first, and then several advanced multisegment SVPWM algorithms are proposed. According to the particularity of the three-level NPC topology, two hybrid SVPWM algorithms are proposed to optimize harmonic performance. Moreover, the high-order harmonic characteristics and the number of switching actions are analyzed in detail for all SVPWM algorithm modes. In addition, these SVPWM algorithms are associated and unified by introducing weight coefficients of the redundant vectors. Simulation and experimental results verify the feasibility and effectiveness of the proposed SVPWM algorithms, which show that the proposed methods can optimize high-order harmonic distribution and reduce the line current harmonics. [ABSTRACT FROM AUTHOR]

Multiple techniques have been suggested to achieve control balance in single-phase three-level neutral-point clamped (3L-NPC) converters. Nevertheless, there is a deficiency of quantitative calculations related to the extent of balancing. Operating beyond the balancing range may result in a sequence of safety incidents. This paper presents a conceptualization of the 3L-NPC converter as two cascaded H-bridges. By employing power conservation principles, the balancing range for the NPC converter is derived, and two novel methods are investigated to broaden the balance range in accordance with the calculated balance range. A comparison is made among the balancing ranges under different balancing control methods. This study establishes a theoretical foundation to ensure the secure and stable operation of the NPC converter. [ABSTRACT FROM AUTHOR]

• The backup protection scheme based on traveling wave and waveform similarity is proposed for the VSC-HVDC transmission line. • The difference in 1-mode forward and backward traveling waves between internal and external faults are proven theoretically. • The difference in instantaneous currents between faulty-pole and unfaulty-pole DC lines are proven theoretically. • The protection scheme has superiorities in fault resistance tolerance (2,000 Ω) and quicker fault judgment (less than 4 ms). • The protection scheme can identify the double-pole-to-ground fault with unequal positive-pole and negative-pole fault resistances accurately. The voltage source converter based high voltage direct current (VSC-HVDC) system is a practical solution to improve renewable energy integration, flexible consumption, and wide-range complementarity. Because the DC line fault must be cleared within a few milliseconds, a reliable and rapid identification of faulty lines and poles is crucial. Unfortunately, the traditional backup protection cannot respond to internal faults fast enough and is sensitive to fault resistance. What is worse is that a double-pole-to-ground fault with unequal positive-pole and negative-pole fault resistances cannot be identified by most of the existing protection methods. The paper proposes a pilot backup protection based on directional traveling wave and waveform similarity for VSC-HVDC transmission lines to compensate for the drawbacks. The fault characteristic of 1-mode directional traveling waves and the waveform similarity of instantaneous currents of DC lines are elaborated theoretically. Based on the analyses, the protection is established, and the four-terminal VSC-HVDC grid is modeled in PSCAD and OPAL-RT. Detailed theoretical analyses and extensive simulation/experiment results have proven that the proposed protection scheme has higher reliability, selectivity, rapidity, and sensitivity. Compared with the existing backup protections, the proposed protection scheme has superiorities in fault resistance and distance tolerance (2,000 Ω and the entire length of DC lines), fault differentiation of double-pole-to-ground fault with unequal positive-pole and negative-pole fault resistances, immunity from signal noise and measurement error interference, and quicker fault judgment (less than 4 ms). © 2017 Elsevier Inc. All rights reserved. [ABSTRACT FROM AUTHOR]

Providing a sinusoidal line current with few low-order harmonics is important for power converters. First, the influence mechanisms of multifactors for the line current distortion in single-phase three-level neutral point clamped converters are analyzed in theory. Second, the corresponding compensation methods for various factors are discussed, respectively. Particularly, the phenomenon that deadtime effects on harmonics is revealed by the theoretical derivation of Fourier series, and a corresponding quantitative calculation method is proposed and used to solve the compensation component of the deadtime delay. The detailed and strict mathematical deduction provides an alternative theoretical system for the quantitative analysis and compensation of deadtime and forward voltage drops effects. As for the component to compensate the unsteady forward voltage drops, it is online computation with current variations. Then, a comprehensive distortion compensation method by injecting offset voltage in the modulated signal is proposed to improve the line current waveform quality. Finally, simulation results verify the correctness of the quantitative calculation of deadtime effect on harmonics, and experimental tests verify that the proposed method can effectively reduce total harmonic distortion and improve waveform quality of the line current. [ABSTRACT FROM PUBLISHER]

• The non-unit protection based on the traveling waveform similarity is proposed for the VSC-HVDC transmission line. • The traveling waveform similarity differences between internal and external faults are proved in theory. • The protection scheme can identify the double-pole-to-ground fault with its positive-pole fault resistance unequal to negative-pole fault resistance accurately. • The scheme provides high performance considering the possible influence factors. • The method improves the protection selectivity, reliability, rapidity, and sensitivity. The protection for the voltage source converter based high voltage direct current (VSC-HVDC) transmission lines must detect the faulty DC lines and faulty poles within a few milliseconds, because the fault current rises quickly. The traditional protections are easily influenced by fault resistance and signal noise. What is worse, the double-pole-to-ground (DPG) fault with its positive-pole fault resistance unequal to negative-pole fault resistance cannot be detected accurately. To solve the problems, a non-unit protection scheme based on the waveform similarity and wavelet transform modulus maximum (WTMM) theories for the VSC-HVDC lines is proposed in this paper. A four-terminal VSC-HVDC power network is modeled in PSCAD to verify the protection. Extensive simulations of various fault situations prove that the protection scheme can detect high-fault-resistance, DPG, and remote faults. Moreover, it is insensitive to the sampling frequency, signal noise, smoothing reactor, and start delay. Furthermore, it can meet the rapidity requirement. Therefore, the proposed protection can identify the DC faults accurately, which minimizes the disturbance to power grids and improves system security and stability. [ABSTRACT FROM AUTHOR]

A significant problem of three‐level neutral point clamped converters is the fluctuation of the neutral point voltage. A space vector pulse width modulation (SVPWM) strategy with neutral point voltage balancing for single‐phase three‐level converters adopted widely in railway traction drive system is proposed in this study. The relationship between the adopted SVPWM and carrier‐based pulse width modulation (CBPWM) with an offset voltage injection (OVI) is analysed in details. Theoretical analysis shows that the adopted SVPWM is a special type of CBPWM‐OVI methods, and can balance the neutral point voltage effectively. The high‐order harmonics of the line current distribute around twice switching frequencies while the SVPWM algorithm is adopted. These performances of the proposed SVPWM are verified by simulation and experimental tests. [ABSTRACT FROM AUTHOR]

The voltage source converter based high voltage direct current (VSC-HVDC) technology is a feasible solution to realize wide-area complementarity and flexible consumption of the renewable clean energy resources but DC line faults are crucial problems. The traditional traveling wave protection for HVDC transmission lines are easily affected by the fault resistance and signal noise. Besides, it cannot detect the double-pole-to-ground fault. To overcome these problems, a single-ended protection scheme based on the phase-mode transformation and wavelet transform modulus maximum (WTMM) theories for DC lines in the VSC-HVDC transmission system is proposed in this paper. The protection scheme includes the protection startup unit, the internal fault identification unit, and the faulty pole detection unit. Extensive simulation tests carried out in PSCAD/EMTDC verify that the protection scheme has high selectivity in the high fault resistance faults, remote faults, and close-by faults with different fault types. And it does not rely too much on data synchronization. Furthermore, sensitivity analysis and comparisons with other methods indicate that the protection is insensitive to signal noise and suitable for different operational modes. And the effectiveness of the protection is independent of the high sampling frequency. Moreover, it can identify the double-pole-to-ground fault correctly. • A single-ended protection scheme is proposed for VSC-HVDC Transmission Lines. • The method improves the selectivity, reliability, and rapidity of protection systems. • The proposed protection scheme is able to identify the double-pole-to-ground faults. • The different signal noise levels and operational modes do not affect the protection. • The effectiveness of the protection is independent of the high sampling frequency. [ABSTRACT FROM AUTHOR]

This paper proposes an accurate impedance model for line commutated converter (LCC) in the stationary frame. The commutation overlap process caused by the transformer leakage inductance complicates the modeling for LCC. Traditional impedance models are derived in positive sequence and negative sequence frame based on the simplified commutation overlap process, which degrades the modeling accuracy and limits the description of frequency coupling. This paper systematically analyzes the effects of the commutation overlap process on the impedance model, and the impedance model with the accurate commutation overlap process is established in the dq-frame. For clearly revealing the frequency coupling phenomenon of the LCC, the complex space vector is employed to extend the impedance model in the dq-frame to the complex αβ-frame. A closed-loop model on PSCAD/EMTDC is used to verify the proposed impedance model in the time-domain and the frequency-domain. The consistency between the simulation results and theoretical analysis effectively verifies the accuracy of the proposed model. [ABSTRACT FROM AUTHOR]

This paper develops an accurate small signal model for line commutated converter based HVDC (LCC-HVDC). The overall process of the model establishment is demonstrated from five parts: AC system, DC system, control system, phase-locked loop (PLL) and the converter. Considering the limitations of the traditional converter equations, the proposed small signal model takes the commutation process into account so that the overlap angle and AC current are calculated with the actual value rather than the estimated value. The accuracy of the proposed model is verified both in the time-domain simulation in PSCAD/EMTDC and by eigenvalue analysis. The results show better performance than the traditional modeling methods, which provides valuable guidance for future LCC-HVDC project design. [ABSTRACT FROM AUTHOR]

Replacing expensive IGBT with thyristor to design dc circuit breaker (dcCB) is attracting attention recently due to its advantages in terms of low investment and low conduction loss. However, due to the half-controlled characteristic of thyristor, the existing thyristor-based dcCBs (T-CBs) cannot be actively turned off. As a result, the opening process is not fully controllable and reliable. In this letter, a simple active T-CB (AT-CB) topology is proposed. The proposed AT-CB can interrupt both fault current and operation current actively, and the current breaking process is fast, reliable, and fully controllable. Moreover, the proposed AT-CB can be improved to be bidirectional without increasing the conduction loss, and the topology remains simple. Parameters design principle and operation process of AT-CB are presented. Scaled-down experiment verified the effectiveness of the proposed solution. [ABSTRACT FROM AUTHOR]

• The backup protection including fault identification and location methods is proposed for VSC-HVDC transmission lines. • The waveform difference in same/different-mode traveling waves between faulty and unfaulty lines is elaborated in theory. • The protection can identify the double-pole-to-ground fault with unequal positive and negative pole fault resistances. • The waveform difference between 1-mode differential forward and backward currents can locate faults rapidly and accurately. • The methods can improve the protection selectivity, reliability, rapidity, and sensitivity. Due to the low-damping characteristic of the voltage source converter based high voltage direct current (VSC-HVDC) transmission system, the line current will reach the peak value within a few milliseconds after DC fault, threatening the safety of power electronic devices. Therefore, a reliable and rapid protection scheme comprising fault identification and location is necessary. The detection time cost of traditional backup protections is high. Worse still, most existing methods cannot distinguish the double-pole-to-ground fault with unequal positive and negative pole fault resistances. To solve the issues, a backup protection based on the same/different-mode traveling wave, differential forward/backward current, and traveling waveform difference for VSC-HVDC lines is proposed in the paper. The fault characteristics of same/different-mode traveling wave and relationship between fault distance and differential forward/backward current are elaborated. The waveform differences in positive/negative-pole same/different-mode traveling waves and 1-mode differential forward/backward currents are summarized. According to these analyses, the protection is established and the VSC-HVDC is modeled in PSCAD. Based on the sufficient simulation tests, it is verified the proposed fault identification and location schemes have great performance, with superiority in fault resistance and distance tolerance (2,000 Ω and the whole line), strong anti-interference capability, fast fault distinguishment, and accurate fault location. [ABSTRACT FROM AUTHOR]

This paper presents a new model predictive direct power control (MP-DPC) to overcome the drawbacks of model predictive control (MPC) for single phase three-level rectifiers in the railway traction drive system, including huge online calculation, poor power control precision at the low switching frequency and variable switching frequency. To do so, an exact analytical solution of instantaneous power estimation is adopted to predict active and reactive powers in next duty cycle updating interval for achieving the deadbeat control and reducing the predictive error at the low switching frequency (below 1 kHz). The optimal d-axis and q-axis components of input voltage within next duty cycle updating interval of the adopted rectifier in rotating coordinate system are directly calculated by minimizing the cost function. And the optimal drive pulses are generated by pulse width modulation stage in the proposed MP-DPC, other than evaluating cost function for each voltage vector in traditional MP-DPC. Finally, the influence of inductance mismatch on control system is analyzed, and an inductance estimation method is shown to improve the control precision. An experimental comparison with other five different DPC schemes has verified the effectiveness of the proposed MP-DPC scheme. [ABSTRACT FROM AUTHOR]

This paper proposes a simple model predictive direct power control (MP-DPC) of single-phase pulsewidth-modulated rectifiers with constant switching frequency using modulation function optimization. The instantaneous active and reactive power theory for single-phase converters is discussed, on the basis of a second-order generalized integrator. The modulation function is resolved from the cost function of the MP-DPC scheme. The relationship between the instantaneous powers and ac-side inductance mismatch is discussed. The inductance mismatch has an effect on the reactive power, but not effect on active power. The quantitative expression of reactive power caused by inductance mismatch is shown and verified in the experimental test. An inductance parameter online estimation scheme is proposed to eliminate its effect on reactive power. Compared with the conventional proportional-integral-based instantaneous current control scheme and finite-control-set MP-DPC scheme, the proposed MP-DPC can provide these advantageous features: lower current harmonics and total harmonic distortion components, faster dynamic response, fewer adjusted parameters, and zero steady-state error. In addition, the proposed MP-DPC is free of the weighting factor selection in cost function. The effectiveness of the proposed MP-DPC scheme is verified by experimental results. [ABSTRACT FROM AUTHOR]

The converter with a single-phase rectifier, a dc-link circuit and a three-phase inverter is widely applied in high-speed railway electrical traction drive system. The fault frequency of single-phase rectifier is higher than that of three-phase inverter. Thus, this paper presents a new and fast model-based approach for open-switch fault diagnosis of the single-phase pulse width modulation rectifier, based on the mixed logical dynamic model and residual generation. It requires no additional hardware but only some measurements and command signals which are available in control system. This diagnosis method is quite suitable for electrical traction application due to the fast diagnosis time, simple structure and high reliability. Experimental results confirm the effectiveness and accuracy of the proposed algorithm. It is shown that such diagnosis method can locate the faulty switch in a few milliseconds which is important to avoid catastrophic consequences. [ABSTRACT FROM AUTHOR]

Online parameter identification is vital for boosting the accuracy of the battery equivalent circuit model (ECM) under dynamic profiles. However, traditional recursive least squares (RLS) method easily decays with the noise corruption from sensors or insufficient exciting signal in reality, which further limits the performance of ECM in battery modeling and states estimation. This article thus proposes a reliable online parameter identification method for battery ECM, which utilizes a well-designed information appraisal procedure based on the Fisher-information-based Cramer–Rao lower bound (CRLB). Without increasing much computing complexity, a comprehensive appraisal indicator, derived recursively from CRLB, enables a new mechanism for online parameter updating. Simulation and experimental results prove the validity of the proposed method under different driving cycles, temperatures, and aging conditions. The results show that the identification accuracy of the proposed method has been significantly improved comparing with a typical RLS and a multiple adaptive forgetting factors RLS method. [ABSTRACT FROM AUTHOR]

Power synchronization control (PSC) is an effective control method for a voltage-source converter (VSC) connected with a weak grid, where the short-circuit ratio is close to 1. The grid voltage sag will induce the synchronization instability of PSC-VSC and then trigger the catastrophic cascading failure in the power system. This letter presents the transient power angle nature of PSC under the grid disturbance by phase portrait, and the critical condition of transient synchronization instability for PSC is derived. The virtual orthogonal power (VOP) is elaborated and the power angle estimation method is presented by VOP. Then, a mode adaptive transient synchronization stability control scheme is proposed for the low-voltage ride through with the power angle estimation scheme. By using the proposed transient synchronization stability control scheme, the PSC-VSC can maintain synchronization with the grid during the fault of grid voltage sag. The control method theoretical analysis is verified by the experimental tests. [ABSTRACT FROM AUTHOR]

This article proposes a multisampling method for single-phase grid-connected cascaded H-bridge (CHB) multilevel inverters with the phase-shifted carrier pulsewidth modulation in order to reduce the time delay involved in the control loop and increase the control bandwidth. In this method, the controlled variables are sampled not only at the peak and the valley of all triangular carriers, but also at the intersection points of all phase-shifted carriers and inverted ones, which enables a minimum unity sampling interval without detecting the current ripple caused by the switching action and breaking the voltage-second balance in the modulation process. The bandwidth of the current control loop based on the proposed sampling method is illustrated and compared to other traditional sampling methods. The analysis shows that the system effectively reduces the time delay involved in the control loop and improves the bandwidth of the control loop. Finally, a downscale test platform of the single-phase grid-connected CHB multilevel inverter with an inductance (L)-filter is built to verify the effectiveness of the proposed method. [ABSTRACT FROM AUTHOR]

In order to diminish the impacts brought by high penetration of renewable energy on the reliability of distribution systems, some distribution networks (e.g. Chattanooga electric power board system) have deployed smart switches (SSs) to island some areas to mitigate outage losses. However, due to intermittency and sharply changing rate of renewable energy, it is likely to experience insufficient or excessive power for islanded areas. Therefore, a microgrid controller featured with flexible boundaries is proposed. With proposed microgrid controller, the microgrid can not only shrink or expand its boundaries according to current renewable energy supply, but also disconnect/connect to the main grid with a designated SS. Moreover, to ensure the microgrid controller could obtain suitable boundaries on the time scale of seconds, a real-time power management technique with alternative generating algorithm is designed to generate all possible alternative boundaries and choose the optimal one, which is scalable to any topology. In addition, in order to maintain state of charge of batteries within a desirable range, anti-overcharge/discharge strategies are designed. Four comprehensive experiments verify that the implementation of the microgrid controllers can realise flexible boundaries and deal with sharply changing rate of renewable generation or load on the time scale of seconds. [ABSTRACT FROM AUTHOR]

In order to diminish the impacts brought by high penetration of renewable energy on the reliability of distribution systems, some distribution networks (e.g. Chattanooga electric power board system) have deployed smart switches (SSs) to island some areas to mitigate outage losses. However, due to intermittency and sharply changing rate of renewable energy, it is likely to experience insufficient or excessive power for islanded areas. Therefore, a microgrid controller featured with flexible boundaries is proposed. With proposed microgrid controller, the microgrid can not only shrink or expand its boundaries according to current renewable energy supply, but also disconnect/connect to the main grid with a designated SS. Moreover, to ensure the microgrid controller could obtain suitable boundaries on the time scale of seconds, a real‐time power management technique with alternative generating algorithm is designed to generate all possible alternative boundaries and choose the optimal one, which is scalable to any topology. In addition, in order to maintain state of charge of batteries within a desirable range, anti‐overcharge/discharge strategies are designed. Four comprehensive experiments verify that the implementation of the microgrid controllers can realise flexible boundaries and deal with sharply changing rate of renewable generation or load on the time scale of seconds. [ABSTRACT FROM AUTHOR]

The time delay caused by the digital computation and the update of the duty cycle tend to worsen the dynamic performance of digitally controlled power converters. This paper proposes a real-time calculation method for single-phase cascaded H-bridge (CHB) inverters with the phase-shifted carrier pulsewidth modulation (PSC-PWM) to eliminate the time delay caused by the digital computation in the control loop without the loss of duty cycle. In the approach, a sampling method for the PSC-PWM applied in a single-phase CHB inverter is introduced, which samples the current and voltage at points of the intersection for triangular carriers of legs in all adjacent H-bridge cells. The sampling method is used alternately with the conventional regular sampling method by following a selection rule in order to avoid the loss of duty cycle. Experimental results verify that the proposed method effectively improves the transient performance of the current control loop and suppresses the effect of the distortion of the grid voltage on the line current. [ABSTRACT FROM AUTHOR]