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To investigate the effects of surface leakage on the temperature-dependent dark and optical performance of a heterojunction phototransistor (HPT), three sets of HPTs were prepared. They were unpassivated (HPT A), passivated with diluted (NH4)2S (HPT B), and passivated with neutralized (NH4)2S (HPT C). Passivation treatment successfully suppresses surface-defect-induced effects. The passivated HPTs exhibit a reduced dark current and an enhanced signal-to-noise ratio (SNR). HPT A exhibits a room-temperature collector dark current (ICdark) of 0.59 nA at a VCE of 1 V, while those of HPTs B and C are 0.03 and 0.89 pA, respectively. The room-temperature SNR values for HPTs A, B, and C at a Pin of 8.3 (107.6) nW are 5.9 (42), 59 (91), and 91 (122) dB, respectively. After a three-week air exposure, the room-temperature SNR at a Pin of 107.6 nW decreases to 25 (67) dB for HPT A (B), while it is 116 dB for HPT C. The decrease for HPT C is only 6 dB. A long-term stable passivation with good thermal stability has been achieved by neutralized (NH4)2S treatment.

In this paper, an investigation of the static/dynamic performance of dual-emitter phototransistors (DEPTs) as an electrooptical switch was made. In the static case, the measured optical gains (the collector photocurrents) of DEPTs operated at a 12.5-muW optical power have been enhanced from 13.7 to 20.2 (88 to 129 muA) due to an emitter-induced gain high (EIGH) from photocurrent modulation. For DEPTs as an electrooptical switch, the EIGH from photocurrent modulation and the emitter-induced gain effect from junction-voltage modulation dominate the dynamic operation. In the case of continuous light input, good bistable-state output characteristics can be realized with an electrical clock signal. When the switch is operated with a 2-V supply voltage and a 10-kOmega load resistance, the stable electrical-logic swing (ELS) is 0.41 V for a 1-V/1-kHz clock signal. Electrical inputs of 5-, 10-, and 50-kHz clock signals are also employed to achieve outputs with increased ELSs of 1.18, 1.19, and 1.3 V, respectively. An optical inverter is realized. When two clock signals, an electrical input and an optical input, are employed, DEPTs are operated as a tristable-state switch.

The influence of gate metal with thermal annealed process adopt to control the distance between gate and channel on pseudomorphic Al0.24Ga0.76As/ In0.22Ga0.78As double heterojunction high electron mobility transistors (DH-HEMTs) were studied. Compared to device with gate-recess process, the distance of gate-to-channel could be controlled through the thermal annealed process and therefore exhibit a lower series resistance. Measured transconductance of 150 mS/mm and an open- drain voltage gain of 136 for the DH-HEMT with an as deposited gate are enhanced to 175 mS/mm and 160 for the DH-HEMT with a 330-{degree sign}C annealed gate. Good device linearity is also obtained with a low second-harmonic to fundamental ratio of 3.55 %. In addition, good microwave performances such as unit-current gain- and maximum power gain- frequency were also obtained from devices with gate-annealed process.

N-p-n InGaP/GaAs Dual-Emitter heterojunction phototransistor (DEPT) with/without InGaP-passivation layer have been fabricated to investigate the influence of surface leakage on the device optical performance. The comparison between DEPT with a voltage-biased emitter and HPT with a voltage-biased base is also included. There are four (three) operating regions appearing in the optical characteristics of the DEPT (HPT): negative-saturation, negative-tuning, positive-tuning, and positive-saturation (cut-off, tuning, and saturation) regions. The InGaP-passivated DEPT with the extrinsic base surface passivated by InGaP, exhibits the maximum optical gains of 46.57, 46.86 and 47.39 while the non-passivated one shows those of 32.02, 33.55 and 33.57 under the optical powers of 8.62, 13.2 and 17.5 μW, respectively. However, the optical gains are only in the range of 0.93~2.0 (0.83~1.64) for the InGaP- passivated HPT (non-passivated HPT) for all the illuminating conditions.

Heterojunction doped-channel field-effect transistors (HDCFETs) with a self-built field-plate gate formation were fabricated and proposed in this work. Arrangement of Schottky metal across a step undercut between the Schottky barrier and the insulator-like layer is the key process to produce a self-built field-plate gate. A controllably reduced gate length and a self-built field plate were simultaneously formed. Effects of gate-metal length, field-plate length and insulator thickness on HDCFET performance were also investigated. Simulated results reveal that higher currents, lower electric fields, better device linearity and larger output power are expected by offsetting the Schottky metal towards the drain side. A HDCFET with gate-metal length of 0.4 µm, field-plate length of 0.6 µm and insulator thickness of 120 nm was successfully fabricated for comparison to that with a 1 µm traditional planar gate. Current density (451 mA mm−1), transconductance (225 mS mm−1), breakdown voltages (VBD(DS)/VBD(GD) = 22/−25.5 V), gate-voltage swing (2.24 V), unity current-gain and power-gain frequencies (ft/fmax = 17.2/32 GHz) are improved as compared to those of a 1 µm gate device without field plates. At 1.8 GHz and VDS of 4.0 V, maximum power-added efficiency of 36% with output power of 13.9 dBm and power gain of 8.7 dB was obtained. Saturated output power and linear power gain are 316 mW mm−1 and 13 dB, respectively.

Depletion-mode Al0.24Ga0.76As/In0.22Ga0.78As double-heterojunction high electron mobility transistors (DH-HEMTs) were fabricated with an as deposited gate to compare with those with a buried gate by annealing. Instead of a recessed gate, a buried gate used to control the distance between the gate and channel (and hence the aspect ratio) improves the series resistance. Measured transconductance of 150 mS mm−1 and an open-drain voltage gain of 136 for the DH-HEMT with an as deposited gate are enhanced to 175 mS mm−1 and 160 for the DH-HEMT with a 330 °C annealed gate. Good device linearity is also obtained with a low second harmonic to fundamental ratio of 3.55%. The measured maximums fts (fmaxs) are 13.5, 13.5 and 14.5 (35, 37, and 37.5) GHz for DH-HEMTs with an as deposited gate, and with 280 °C and 330 °C annealed gates, respectively. At a measured frequency of 2.4 GHz, the DH-HEMT with a 330 °C annealed gate exhibits the highest PAE = 44.8% at VDS = 3 V and VGS = −1.0 V and the lowest Fmin = 1.89 dB at VDS = 3 V and ID = 200 mA mm−1.

Depletion-mode δ-doped In0.5Ga0.5As/In0.5Al0.5As mHEMTs have been metamorphically grown on a GaAs substrate and successfully fabricated with different kinds of gate-metal formation. The gate-metal formations include a combination of mesa- or air-type gate feeder with or without a buried gate (before or after annealing). Only the air-type mHEMT with a buried gate shows no clear kink-effect behaviour. For a 1 µm gate mesa-type (air-type) mHEMT, a maximum extrinsic transconductance of 412 (414) and 535 (472) mS mm−1 is obtained before annealing and after annealing. There is a 207 mV (205 mV) shift in VTH after the mesa-type (air-type) mHEMT is annealed. Experimental results indicate that both the gate-feeder metal and the annealing process have a significant effect on output conductance, gate leakage current, breakdown voltage, high frequency and noise performances. The peak gate leakage current density of 12 (120) µA mm−1 for the air-type (mesa-type) mHEMT before annealing is improved to 8 (55) µA mm−1 after annealing. At 2.4 (5.4) GHz, gain = 23 (20) dB can be obtained at Fmin = 1.27 (1.76) dB for the air-type mHEMT after annealing, while gain = 22 (18.5) dB is obtained at Fmin = 1.36 (2.0) dB before annealing. For the mesa-type mHEMT, these values are gain = 20 (16.5) dB at Fmin = 1.47 (2.25) dB and gain = 19.5 (14) dB at Fmin = 1.68 (3.11) dB.

N–p–n InGaP/GaAs Dual-Emitter HPTs (DEHPTs) with and without extrinsic base surface passivation were fabricated to investigate the influence of the surface leakage on the device’s optical performance. There are four operating regions appearing in the output characteristics of DEHPTs under illumination: negative-saturation, negative-tuning, positive-tuning and positive-saturation regions. The InGaP-passivated DEHPT (P-DEHPT), i.e. DEHPT with the extrinsic base surface passivated by InGaP, exhibits the maximum optical gains of 46.57, 46.86 and 47.39 while the non-passivated one (NP-DEHPT) shows ones of 32.02, 33.55 and 33.57 for optical powers of 8.62, 13.2 and 17.5 μW, respectively. However, the NP-DEHPT exhibits the larger peak gain-tuning efficiencies of 37.35, 41.03 and 44.10 compared to 12.76, 13.72 and 16.01 V −1 for the P-DEHPT for optical powers of 8.62, 13.2 and 17.5 μW, respectively. The better tuning efficiency makes the NP-DEHPT a possible low optical power optoelectronic application.

An InGaP/GaAs dual-emitter heterojunction phototransistor (DEPT) with a voltage-biased emitter is compared with a conventional heterojunction phototransistor (HPT) with a voltage-biased base. There are four (three) operating regions in the photocurrent–voltage characteristics of the DEPT (HPT): negative-saturation, negative-tuning, positive-tuning, and positive-saturation (cutoff, positive-tuning, and positive-saturation) regions. The power- and voltage-tunable optical gains are obtained in the DEPT, while only the voltage-tunable optical gain in the HPT. In addition, the maximum optical gain (32.3) obtained in the DEPT is 20-fold that (1.64) in the HPT. Experimental results show that 1) the voltage-tunable optical gain ranges from 0.8 to 1.64 with a gain-tuning efficiency of only 4.4 V-1 for the HPT and that 2) the DEPT exhibits a voltage-tunable optical gain ranging from 12.9 to 32.3 with a maximum gain-tuning efficiency of 43.4 V-1. Furthermore, a simple circuit model is developed to describe well the optical performance tuned by a voltage for both the DEPT and HPT. Experimental and modelling results indicate that the DEPT is very promising for optoelectronic applications when a low optical power is used.

We report on the InGaP/GaAs dual-emitter heterojunction phototransistors (DEPTs) with an emitter biased using a voltage for comparison to heterojunction phototransistors (HPTs) with a floating base operated in the p-i-n and transistor modes and to the HPTs with a base biased using a voltage. The optical gain of the DEPT is presented to be tunable with both of the voltage applied to the emitter and the incident optical power. On the contrary, a conventional HPT's configuration does not simultaneously exhibit both. The power-tunable optical gain is available when the base of the HPT is floated. Otherwise, the voltage-tunable optical is expected for the HPT with a voltage biased base. Experimental results show that (1) the HPT with a voltage biased base exhibits a gain-tuning efficiency of 4.4 V- 1 and (2) the DEPT with an emitter biased using a voltage exhibits a gain-tuning efficiency of 43.4 V-1.

V-gate heterojunction doped-channel field-effect transistors (HDCFETs) with a 0.12 ?m gate-metal footprint were fabricated through a 1??m patterned photoresist using conventional optical lithography. The measured transconductance and output conductance are 200 and 3.5?mS?mm?1, respectively, resulting in a high open-drain voltage gain of 57. In spite of higher unity-current gain and unity-power gain frequencies (21 and 32 GHz) as compared with those (9.5 and 17 GHz) of a 1 ?m planar-gate HDCFET, the frequency enhancement for a V-gate HDCFET with such a short 0.12 ?m gate-metal footprint is not very significant. Simulated results reveal that both the triangular-metal fringe and sacrificial layer play an important role in HDCFET dc and ac performances. Experimental and simulated results reveal that (1) the triangular-metal fringe is advantageous to improve short-channel effects and to enhance the dc performance, (2) the gate fringing capacitance due to the triangular-metal fringe and the 0.455 ?m sacrificial layer contributes 60% of capacitance to the total gate-to-source capacitance, and (3) even if there is no sacrificial layer upon the Schottky layer, the triangular-metal fringe still contributes 15% of capacitance to the total gate-to-source capacitance.

This paper reports on InGaP/GaAs heterojunction bipolar transistors (HBTs) with a sulfur-treated base layer, which are then compared to InGaP/GaAs HBTs with an InGaP-passivated base layer. Experimental results reveal that the improvement in base leakage current for InGaP-passivated HBTs is due to the inherent low surface recombination velocity associated with an InGaP layer while it is the electronic modification of the GaAs surface for sulfur-treated HBTs. The maximum dc current gain available is β = 75 with a base sheet resistance of R B = 220 Ω / □ for a sulfur-passivated HBT. The sulfur-passivated HBTs also exhibit very good linearity over a wide collector current range of 10−5 to 10−1 A. Furthermore, detailed sulfur treatment conditions and effects on device performances including post-treatment stability are investigated.

Fabrication, characterization and modelling of heterojunction phototransistors (HPTs) are reported. The common-emitter (with current-biased base) and Gummel-plot (with voltage-biased base) modes are employed to characterize and fully comprehend what differences exist between the current- and voltage-biased HPT's performance. The results of further studies include the case when a series of different optical-power injection levels is illuminated at our HPTs. The performance of the current- and voltage-biased HPTs was also compared to that from a newly proposed HPT model and related equivalent circuit with good agreement found. Although an independent voltage source can be used to tune the operating point of a heterojunction bipolar transistor to a higher current level where the dc current gain is larger, the photocurrent generated within the base–collector (B–C) region offers few contributions to the final collector photocurrent. The optical gain obtained from the HPT biased using a high voltage is even smaller than that of the HPT with a floating base. It is concluded that (i) a current-biased HPT's dc base current and photocurrent generated within the B–C region entirely flow into the base–emitter (B–E) junction so that the device's optical gain is enhanced; (ii) however, no enhancement of optical gain for a HPT will be obtained using dc base bias, since the dc current gain is independent of collector (or base) current; (iii) a voltage-biased HPT behaves like a p–i–n photodiode and (iv) electrical base bias using a high external voltage source with a large series resistance is a possible way to enhance the optical gain of a HPT.

Fabrication, characterization, and modeling of three-terminal (3T) heterojunction phototransistors (HPTs) using an InGaP layer for passivation (called P-HPTs) compared with similar nonpassivated devices (called NP-HPTs) were reported. Effects of the base passivated by the InGaP layer on devices optical and electrical performance were investigated. In addition to improving the dc current gain in the small current regime, the photocurrent (I/sub ph/) and responsivity from the p-i-n diode formed by the base, collector, and subcollector are also enhanced in a P-HPT. The measured optical gains are 45 and 27 for a P- and an NP-HPT under 8.62-/spl mu/W optical injection operated as a two-terminal (2T) device with a floating base. When the base bias is applied from a voltage source, both 3T P- and NP-HPTs exhibit degraded optical gains. Although a voltage source applied to the base can be used to push the operating point of a heterojunction bipolar transistor to a higher collector current where the current gain is higher, only a small portion of the photocurrent generated within the base-collector region is injected across the base-emitter junction to be amplified. When the base of an HPT is biased using a current source, the I/sub ph/ and enhanced dc current gain mainly determine both collector photocurrent and optical gain. Thus, a P-HPT biased using a current source shows the best optical performance. Furthermore, the conventional Ebers-Moll equivalent-circuit model was extended to provide simulated results in good agreement with experiment.

Experiments and modelling of new three-terminal heterojunction phototransistors with double emitters (DE-HPTs) but no base contact are reported for comparison with single-emitter HPTs (SE-HPT) without base electrode and conventional HPTs with a base electrode using the same epi-layers. Double emitters having a different area ratio (A1: A2) but a fixed total area together with a collector form a three-terminal device. As a voltage-bias emitter instead of a current-bias base is used, a DE-HPT exhibits an enhanced collector photocurrent in comparison with a SE-HPT with the same total emitter area. Experimental results reveal that 2: 1 and 1:1 DE-HPTs exhibit a 1.85- and 1.5-fold optical gain, respectively, over that from a SE-HPT. Other key features of a DE-HPT include the following: (1) the differential emitter voltage used is as small as several hundred millivolts, (2) not only a positive but also a negative voltage can be used to enhance the final collector photocurrent and (3) polarity-dependent characteristics are obtainable for an A1: A2 DE-HPT. Moreover, a new circuit model with three sets of parallel diodes is proposed to explain the performance enhancement and polarity-dependent behaviours. Theoretical results are in very good agreement with experimental ones and indicate that more than three-fold enhancement is expected.

This paper reports the formation of GaAs V-grooves with well-controllable notch angles. The key methodology used to control the notch angle of a V-groove is to preset the temperature of the etching chemicals. Due to increased chemical reaction at the GaAs surface at high temperature, diffusion-limited etching dominates the etched process, resulting in highly isotropic etched profiles. It is found that the notch angle of a V-groove increases with increasing temperature of the etching chemicals. The etching angle used to define the slope of a V-groove increases from 30 to 55° as the temperature decreases from 96 °C to 0 °C. Then V-gates formed by depositing Au metal on V-grooves with different notch angles were employed in the fabrication of InGaP/InGaAs heterojunction doped-channel FETs (HDCFETs). Effects of temperature-dependent notch angle on V-gate HDCFETs were investigated in detail, including dc, ac performances and short-channel effects. Experimental results reveal that a small notch-angle V-gate is quite promising for high-frequency applications. Finally, comparisons between simulated results for planar-gate HDCFETs and experimental results for V-gate HDCFETs are used to determine the equivalent gate length of a V-gate. It is found that the equivalent gate length of a V-gate is in the range of 0.1–0.2 µm.

Direct-current characteristics of the composite-emitter heterojunction bipolar transistor (CEHBTs) having a composite emitter formed of a 0.04 µm In0.5Ga0.5P bulk layer and a 0.06 µm Al0.45Ga0.55As/GaAs digital graded superlattice (DGSL) were investigated. InGaP/DGSL-passivated and DGSL-passivated CEHBTs were fabricated for comparison with a AlGaAs-passivated CEHBT having an InGaP/AlGaAs emitter and a conventional InGaP/GaAs SHBT. In addition to having an extremely small collector–emitter offset voltage, the InGaP/DGSL-passivated and DGSL-passivated CEHBTs exhibit small base–emitter turn-on voltages, which are 130 and 370 mV lower than those of the InGaP/GaAs SHBT and comparison CEHBT, respectively, at a 1 A/cm2 collector current. These results reveal that the DGSL structure forms a gradedlike wide-gap emitter to effectively smooth out the potential spike at the base–emitter heterointerface. The current gain of the InGaP/DGSL-passivated CEHBT is 250 and is even enhanced to 385 by directly removing the InGaP layer. We qualitatively explain these improvements introducing the concept of a built-in electric field within the DGSL structure.

We report on new InGaP/AlGaAs/GaAs composite emitter heterojunction bipolar and phototransistors (CEHBTs/CEHPTs) with a low turn-on voltage. The composite emitter comprised of the digital graded superlattice emitter and the InGaP sub-emitter is used to smooth out potential spike associated with the emitter–base heterojunction and to obtain a low emitter–base turn-on voltage. A fabricated CEHBT exhibits a small offset voltage of 55 mV and a low turn-on voltage of 0.83 V with a dc current gain as high as 150. In case of a CEHPT’s collector–emitter characteristics with base floating, optical gains increase with increasing input optical power. Furthermore, the collector current saturation voltage is small due to a low turn-on voltage. We obtain an optical gain larger than 6.83 with a collector current saturation voltage smaller than 0.5 V. On the other hand, performance results of a CEHPT with two- and three-terminal configuration were investigated and compared.

The dynamic performance of a dual-emitter phototransistor (DEPT) was studied. In the static case of a DEPT under a 12.5 µW optical power, the emitter-induced gain effect from photocurrent modulation improves collector photocurrent (88 to 129 µA). For the DEPT as an electro-optical switch with a 2 V supply voltage, the stable electrical logic swing is 0.41 V for a 1 V clock signal. When a short-period clock signal is applied, a clear electrical logic swing larger than 1.2 V is achieved. The emitter-induced gain effect from both photocurrent modulation and junction-voltage modulation is also introduced to clearly describe DEPT dynamic performance.

This paper reports on a four-terminal dual-emitter heterojunction phototransistor (4T-DEPT) with a base biased by current source in comparison with a three-terminal dual-emitter heterojunction photoreansistor (3T-DEPT) without the additional current bias. While only voltage can be used to tune the optical performance of the 3T-DEPT, two kinds of operation modes, voltage- (VE21) and current- (IBdc) control modes, are considered for the 4T-DEPT. In addition to the power- and voltage-tunable optical gains, current-tunable one is also available in the 4T-DEPT operation. When the 4T-DEPT operates under the incident optical power (Pin) of 0.423 μW, it shows the maximum current-dependent gain-tuning efficiency of 62.66 μA-1 at VE21 = 0.06 V and IBdc = 0.001 μA. However, it is only 45.03 V-1 for the maximum voltage-dependent gain-tuning efficiency at VE21 = 0.06 V and IBdc = 0.25 μA.

not Available.

Temperature-dependent dark and optical characteristics of the InGaP/GaAs heterojunction phototransistors (HPTs) with and without sulfur treatment are studied. As compared to the HPT without (NH 4 ) 2 S treatment (HPT A), treatment at 50°C for 20 min leads to a reduced p-i-n dark current (/dark) and a reduced collector dark current (IC dark ) for the HPT (HPT D) in the emitter-floated and base-floated configurations, respectively. Moreover, the effective reduction of the surface defects also induces an enhanced p-i-n photocurrent (I ph ). The enhanced I ph combined with the promoted dc current gain results in an enhanced optical gain (G) and signal-to-noise ratio (SNR). For HPT A (D) under P in = 107.6 nW at 298 K, the G is 1.42 (20.3) while the SNR is 42 (94) dB. Experimental results indicate that the treated HPTs, compared to the untreated one, are more sensitive to low-power illumination.

InGaP/GaAs dual-emitter heterojunction phototransistors (DEPTs) with an emitter biased using a voltage is reported for comparison to heterojunction phototransistors (HPTs) with a floating base operated in the p–i–n and transistor modes and to the HPTs with a base biased using a voltage. Although the power- and voltage-tunable optical gains are expected when the base of the HPT is floated and biased using a voltage, respectively, a conventional HPT's configuration does not simultaneously exhibit both. On the contrary, the optical gains of the DEPT can be tuned by both the voltage applied to the emitter and the incident optical power. Experimental results show that (1) the power-tunable optical gains are in the range of 11–29 as determined by the incident optical power upon the HPT with a floating base, (2) the small optical gains tuned by a voltage are 0.83–1.6 with a gain-tuning efficiency of 4.4 V-1 for the HPT with a base electrode, and (3) the DEPT with an emitter biased using a voltage exhibits an enhanced optical gain, with a gain-tuning efficiency of 43.4 V-1, when compared with the HPT with a floating base. Finally, a new concept of current-sharing effects in the base region is introduced to explain power- and/or voltage-tunable characteristics with good agreement found.