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Considering the fact that various features can be used in proton exchange membrane fuel cell (PEMFC) fault diagnosis, while the lack of feature evaluation method brings great difficulty in selecting appropriate features at practical PEMFC applications, a generalized feature evaluation and selection method is urgently required in PEMFC fault diagnosis. This paper proposes a novel feature evaluation method, where feature discrimination capacity and robustness are evaluated. With the proposed method, features providing accurate and consistent diagnostic performance can be determined. In the study, features widely used in existing PEMFC fault diagnosis are utilized, which are extracted from either PEMFC voltage or multi-sensor signals, and their effectiveness in identifying faults at different PEMFC systems is investigated. Results demonstrate that with the proposed evaluation method, available features from various PEMFC test data can be ranked based on their diagnostic results. From the findings, appropriate features for PEMFC fault diagnosis can be determined. Moreover, early stage PEMFC faults can also be distinguished with high ranking features. This will be beneficial in practical PEMFC systems, where mitigation strategies can be taken to remove the effect due to early stage faults.

To counteract logic-testing methods and trust verification methods for hardware Trojan (HT) detection, two HT design strategies based on high-low probability and partitioned combinational logic with a malicious reset signal are proposed. Using these two strategies, a power consumption HT and a forced reset HT are designed in a self-developed RISC-V processor. The processor is implemented using SMIC 55nm CMOS technology. Experiments show that, compared to the HTs designed with low-probability nets, the HTs designed with high-low probability strategy can reduce the triggering probability by 87.5%. The HT designed by partitioning combinational logic strategy can increase the false positive rate of HT to 40%. The result can defeat FANCI effectively. In order to enhance the stealth of the HTs, we partitioned combinational logic by using flip-flops with a malicious reset signal. The reset signal participates as a part of the trigger condition, which significantly reduces the trigger probability of HTs.

The globalization of the integrated circuit (IC) industry has raised concerns about hardware Trojans (HT), and there is an urgent need for efficient HT-detection methods of gate-level netlists. Machine learning (ML) is a powerful tool for this purpose. A Trojan-detection framework is proposed in this paper to solve the data imbalance and low accuracy problems of existing ML-based HT-detection algorithms. To solve the problem of data imbalance, we propose the node-filtering algorithm, which extracts structure templates from HT circuits and removes most normal nodes based on them. To enhance the identification of unknown HT payload, we propose the load-expansion algorithm, which expands the identified HT nodes based on their fanout features. We evaluate the framework using different ML algorithms. The results show that the framework significantly improves the Trojan-detection rate of the original algorithms, and achieves a 10% improvement in true positive rate compared to the original algorithms.

We implement an algorithm, termed parallel-processing physical optics, providing an efficient high-frequency approximation method to characterize the scattering of Laguerre–Gaussian (LG) vortex electromagnetic (EM) beams by electrically large-scaled complex targets. The incident beam is described by vector expressions in terms of electric and magnetic fields, and it is combined with rotation Euler angles to achieve an arbitrary incidence of the vortex beam. The validity and capability of the proposed method are illustrated numerically, and the effects of various beam parameters as well as target geometric models such as a blunt cone and Tomahawk-A missile on monostatic and bistatic radar cross section distributions are investigated. Results show that the scattering features of the vortex beam vary significantly with the parameters of the vortex beam and the target. These results are helpful to reveal the scattering mechanism of LG vortex EM beams and provide a reference for the application of vortex beams to detect electrically large-scaled targets.

IN718C alloy and MC carbide reinforced IN718C composites (MC/IN718C) were prepared by casting. Creep behaviors of the two materials were studied. The steady-state creep rate of the MC/IN718C composite at 704 °C under 620 MPa was reduced by an order of magnitude. The higher creep resistance for the MC/IN718C composite was not caused by the increase in the stress exponent or the creep activation energy. Based on the quantitative research of load partitioning in the MC/IN781C composite by using in situ synchrotron high energy X-ray diffraction under tensile loading, it was found the load bearing effect of the MC particles played an important role in the creep resistance improvement of MC/IN718C composite, which reduced the stress on the matrix, slowed down the creep of the matrix, and delayed the failure of the MC/IN718C composite.

The network switches and routers require both high-speed and large-capacity packet buffers. However, existing packet buffer architectures have the problems of speed scaling and flow number scaling limitations. To address the two problems simultaneously, this paper proposes a parallel hybrid SRAM/DRAM architecture for per-flow buffering in high-speed switches and routers. Tail SRAM and head SRAM are used to apply per-flow buffering for packet aggregation, so that the middle DRAM is accessed in a larger granularity and the DRAM's bandwidth utilization is improved. To mitigate the flow number scaling limitation, a dynamic memory allocation with hard timeout (DMA-HT) memory management algorithm is designed. The key idea of DMA-HT is that the memory space is dynamically allocated for the newly arrived flows, and a hard timeout is assigned for each queue. After a specific period of time, the memory space is freed, so that the SRAM space is efficiently utilized by the most recently active flows. A queuing system is used to model the proposed method, and theoretical analysis is performed to optimize the timeout value. With the derived formulas, multiple performance parameters are quantitatively analyzed, and the optimal timeout can be obtained. Both numerical results and simulations show that the proposed architecture can and reduce packet loss rate and average delay significantly compared with previous solutions with the same SRAM capacity.

Based on the research of the standard AS6802 protocol standard [1] and the interpretation of the existing Ethernet time synchronization solution on the FPGA hardware design platform, we designed and implemented a set of Ethernet clock synchronization system that supports the AS6802 standard. The system has been tested in a network environment, and the synchronization accuracy is less than 60 nanoseconds. Use FPGA to record the transparent clock, replacing the MAC IP core time stamping method in the previous Ethernet time synchronization solution. Therefore, this system is more flexible for the reception and transmission of Ethernet frame data, and reduces the dynamic delay introduced by the MAC IP core, which makes the synchronization accuracy higher, and has the characteristics of low cost and easy transplantation.

Space-borne equipment has the characteristics of long in-orbit work cycle, high risk, high development cost, and high maintenance cost. Therefore, it needs to pass the satellite payload ground test before launching. As different space-borne equipment has different testing requirements, it is necessary to develop a variety of corresponding ground test equipment, which leads to problems such as high development costs, long cycles, and difficult software maintenance and updates. This paper designs a set of FPGA-based ground test system for space-borne equipment based on the demand characteristics of satellite equipment ground testing. The system integrates the external interfaces of different onboard equipment into a universal interface adapter, and combines the network tester to test the functions and performance of the onboard equipment. The system efficiently solves the problem of repeated development of ground testing equipment and improves the efficiency of ground testing of space-borne equipment. The application results show that the system has significantly improved the test efficiency in the ground test.

This paper proposes an image processing-based approach for the fault diagnosis of polymer electrolyte membrane (PEM) fuel cells. As more abundant information is contained in the image than that that in 1D signal, features representing PEM fuel cell faults could be better highlighted with the image. Experimental data from a PEM fuel cell system at different states, including flooding and dehydration scenarios, is used to validate the proposed method. By converting the PEM fuel cell voltage signal into a 2D grey image, several features are extracted from the image, their performance in discriminating different PEM fuel cell states is investigated, and two optimal features are determined for fault diagnosis. Moreover, the diagnostic performance of optimal features from grey image is compared with features from PEM fuel cell voltage. Results demonstrate that better diagnostic performance could be obtained with the proposed method.

Time-triggered Ethernet (TTE) technology introduces the concept of time-triggered on the basis of traditional Ethernet, so that it can achieve conflict-free and deterministic service forwarding without sacrificing compatibility. However, storage resources in industrial, aviation, aerospace and other equipment are limited. Therefore, it is important for TTEthernet to develop switching technologies with high storage efficiency and scalability. This paper proposes a dual plane switching (DPS) architecture for TTEthernet, which divides time-triggered services and event-triggered services into two planes for data forwarding. Experimental results show that using the TTE switch of this architecture has the advantages of high clock synchronization accuracy, high throughout, low transmission delay and small jitter of TTE service.

Packet classification is a key function in network security systems in SDN, which detect potential threats by matching the packet header bits and a given rule set. It needs to support multi-dimensional fields, large rule sets, and high throughput. Bit Vector-based packet classification methods can support multi-field matching and achieve a very high throughput, However, the range matching is still challenging. To address issue, this paper proposes a Range Supported Bit Vector (RSBV) algorithm for processing the range fields. RSBV uses specially designed codes to store the pre-computed results in memory, and the result of range matching is derived through pipelined Boolean operations. Through a two-dimensional modular architecture, the RSBV can operate at a high clock frequency and line-rate processing can be guaranteed. Experimental results show that for a 1K and 512-bit OpenFlow rule set, the RSBV can sustain a throughput of 520 Million Packets Per Second.

Cyclic redundancy check (CRC) is a well-known error detection code that is widely used in Ethernet, PCIe, and other transmission protocols. The existing FPGA-based implementation solutions encounter the problem of excessive resource utilization in high-performance scenarios. The padding zeros problem and the introduction of programmability further exacerbate this problem. In this brief, the stride-by-5 algorithm is proposed to achieve the optimal utilization of FPGA resources. The pipelining go back algorithm is proposed to solve the padding zeros problem. The method of reprogramming by HWICAP is proposed to realize programmability with small and constant resource utilization. The experimental results show that the resource utilization of the proposed non-segmented architecture is 80.7%-87.5% and 25.1%-46.2% lower than that of two state-of-the-art FPGA-based CRC implementations, and the proposed segmented architecture has lower resource utilization, by 81.7%-85.9% and 2.9%-20.8%, than two state-of-the-art architectures. Furthermore, throughput and programmability are guaranteed. The source code has been made available on -1.5mm]Please cite reference [1] in the text of the paper. It was removed from the abstract as having references in an abstract is contrary to IEEE journal style. GitHub.

Density functional theory calculations were performed to provide insights into the effect of iron doping in Ni3Fe(1 1 1) catalyst toward the carbon resistance during methane reforming with CO2. The single adsorption (CHx (x = 0–4) and H), co-adsorption between CHx (x = 0–3) and H, the rate constant of each dissociation reaction on Ni3Fe(1 1 1) and Ni(1 1 1) surfaces were comparatively investigated. The oxygen pre-adsorption calculation was also carried out to find out the reason for the effective carbon resistance on Ni3Fe catalyst. The energy barrier in the rate determining step (CH dissociation) on Ni3Fe (1 1 1) surface was lower than that on Ni(1 1 1) surface, the former appeared more favorable for carbon formation. However, considering the pre-adsorption of O which was dissociated from CO2, CH species tended to react with pre-adsorbed O to generate CHO, rather than directly dissociate into C. In addition, the relative rate of C binding with O to form CO on Ni3Fe(1 1 1) was much faster than that on pure Ni(1 1 1) when compared with the rate of CH dehydrogenation. Consequently, the carbon deposition on Ni3Fe catalyst could be effectively suppressed. The catalytic performance of methane reforming with CO2 further experimentally verified that the carbon deposition on Ni3Fe/γ-Al2O3 was less than that on Ni/γ-Al2O3.

TiN particles reinforced IN718C superalloy composite (TiN/IN718C composite) was prepared by investment casting, and the microstructure and mechanical properties of TiN/IN718C composite was investigated. TiN particles were uniformly distributed in the matrix and the harmful δ phase and Laves phase were decreased. The microstructure evolution of the TiN/IN718C composite was caused by the redistribution of the Nb, Ti and C elements in the matrix and TiN particles. The significantly increment of ultimate tensile strength and yield strength of TiN/IN718C composite compared to the matrix IN718C superalloy was attributed to the stress transfer effect of TiN particles and the optimized microstructure.

The development of the space–air–ground integration has put higher demands on satellite network. It needs to support high-bandwidth, large-capacity and various quality of service guarantees. However, the satellite onboard switching is facing the problem of resource constraints and special requirements of hardware complexity and scheduling efficiency. For this, this paper proposes a novel memory architecture for high-bandwidth onboard switching fabric. To reduce hardware complexity, multiplexer is used in the input side to merge k input ports into one internal bus, while the output demultiplexer splits an internal bus into k output links. Shared memory architecture is adopted in the input module to improve the memory efficiency, and a buffered crossbar is used to interconnect the input modules to the output modules. A discrete-time queuing model is formulated, and an iterative approach is used to quantitatively analyze the performance of the proposed architecture. The throughput and delay are calculated under different switch size, input load, and buffer capacity. The numerical results can serve as a guidance on deciding the required buffer size and appropriate speedup ratio. This work is validated by both simulations and FPGA implementations. Synthesize result show that using the state-of-the-art Xilinx VU13P FPGA, a switching fabric with 48 ports can be implemented and the peak throughput of the proposed architecture can reach 480 Gbps. Compared with existing combined input-crosspoint queuing, the proposed architecture can significantly reduce the packet delay and the memory resource cost.

In this study, a crosspoint-queued (CQ) switch that features a buffer size larger than one and employs the work-conserving random scheduling algorithm under uniform Bernoulli i.i.d. traffic is investigated through both theoretical analysis and simulation. The effect of the crosspoint buffer state on switch performance is modelled and quantified. A novel method for calculating the throughput and delay of a CQ switch with a given switch size, input load, and buffer size is proposed. Compared with existing models, the proposed calculation model offers a simpler and more accurate result, and can serve as a theoretical guide in designing high-speed switch fabrics.

This paper investigates effectiveness of various features in fault diagnosis of polymer electrolyte membrane fuel cell (PEMFC) system, including RMSF (root mean square frequency), ACSD (autocorrelation standard deviation) and kurtosis. Test data is collected from a PEMFC system with various conditions, such as normal operation, flooding and drying out scenarios. By extracting selected features from PEMFC voltage, the performance of various features in isolating PEMFC states is investigated using k-means clustering. Results demonstrate that the combination of RMSF and ACSD could provide reliable fault diagnostic performance. Moreover, kurtosis might be used as a fast diagnostic indicator for various PEMFC degradation mechanisms.

Ni base superalloys for structural castings of aero engines demand higher service temperatures and lower costs while retaining their processing characteristics. To achieve these properties, alloying with the rare precious metals inevitably leads to a decrease in the castability and a marked increase in the raw material cost. In this work, we develop a novel Ni base composite (MC/IN718C) with a high creep resistance, excellent microstructure stability and excellent castability by optimizing the chemistry and microstructure of the commercial IN718C superalloy. In this work, both tensile strengths at room temperature and at 704 °C were obviously improved, while the steady-state creep rate of the MC/IN718C composite at 704 °C was reduced by one order of magnitude. The rupture life of MC/IN718C at 704 °C/620 MPa was enhanced by one order of magnitude compared to the IN718C alloy due to the load bearing effect of the MC carbide, the elimination of the metastable strengthening precipitation phase γ″ and a decrease in the harmful Laves and δ phases. MC/IN718C Ni base composite presents a new strategy for the design and preparation of high-temperature materials potentially for critical structural castings. Keywords: Nickel superalloys, Carbides, Synchrotron radiation X-ray diffraction, Creep, Microstructure

Tailoring microstructure of metal matrix composites can achieve superior mechanical properties, especially for the plasticity. In this work, both pure Ni and the 3D network structure TiNNP/Ni composites are synthesized through the combination of low energy balling and spark plasma sintering, with the same process. The strength of the 3D structure TiNNP/Ni composites improved from 180 MPa to 690 MPa while the ductility is as high as the pure Ni prepared.

Today’s switches and routers require high-speed and large-capacity packet buffers to guarantee a line rate up to 100 Gbps as well as more fine-grained quality of service. For this, this paper proposes an efficient parallel hybrid SRAM/DRAM architecture for high-bandwidth switches and routers. Tail SRAM and head SRAM are used for guaranteeing the middle DRAMs are accessed in a larger granularity to improve the bandwidth utilization. Then, a simple yet efficient memory management algorithm is designed. The memory space is dynamically allocated when a flow arrives, and a hard timeout is assigned for each queue. Hence, the SRAM space is utilized more efficiently. A queueing system is used to model the proposed method, and theoretical analysis is performed to optimize the timeout value. Simulation shows that the proposed architecture can reduce packet loss rate significantly compared with previous solutions with the same SRAM capacity.

Selective laser melting (SLM) has drawn increasing attention because of its high degree of flexibility for the design and fabrication of geometrically complex parts. GTD222 is a cast superalloy that is currently used in the energy and aviation fields. SLM of GTD222 is a potential manufacturing method for gas turbine blades or complex parts of aero-engines. In this study, the effect of processing parameters on the metallurgical defects and density of SLM processed (SLMed) GTD222 were studied, and the optimal SLM processing parameters for GTD222 were obtained. Then, SLMed GTD222 samples were prepared based on the optimal SLM processing parameters, and the microstructures and mechanical properties of SLMed GTD222 samples were investigated. The results indicated that the mechanical properties of SLMed GTD222 were obviously improved compared to those of cast GTD222, especially with respect to elongation. The superior mechanical properties were attributed to the amelioration of porosities and micro-segregation, the refined microstructure and the abundant dislocations at sub-crystal boundaries.