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The main technical challenge of the medium-voltage motor drives with modular multilevel converter (MMC) is the serious low-frequency fluctuation on the capacitor voltages, and the existing suppression methods inevitably inject high-frequency circulating currents in MMC. However, the output currents are evidently distorted by the large injected components, while little research has been done to study and solve this problem. This paper analyzes and proves the essential interactions between the output current distortion and the injected components, and the specific dominant output harmonic groups are derived and summarized, revealing the nature of the problem, and it can be taken as a favorable reference for the controller designing. Based on the derivations, this paper proposes a novel suppression method for the greatly improved harmonic characteristics of the output currents during the low-frequency operation. The output harmonics can be accurately measured by the proposed control and effectively suppressed for much lower current total harmonic distortion, benefiting for the superior output control performances with improved efficiency. The simulation results on PSCAD/EMTDC and experimental verifications on a 2.2 kW MMC-based motor drive prototype prove the validity of the presented harmonic analysis and suppression method. [ABSTRACT FROM AUTHOR]

The low-frequency fluctuation over the capacitor voltages seriously limits the development of medium-voltage variable-speed drives with a modular multilevel converter (MMC). Therefore, this paper presents an effective strategy of the low-speed and start-up operation for an MMC-based motor drive. The proposed strategy properly coordinates the improved injection and the reduced average capacitor voltage with high applicability. The specific interactions between the control parameters and the system metrics are analyzed to give the detailed steps of the parameters designing. Hence, based on the derivations, the proposed method enables the low-frequency operation under the nominal load torque with decreased injected components and reduced peak capacitor voltages. What is more, two start-up strategies that, respectively, aim at different objectives for the coordinated strategy are proposed, indicating satisfying control performances for the practical applications. The injected common-mode voltage and circulating current in the proposed method are designed to have a great reduction. Thus, the unfavorable risks for the motor are evidently decreased for better stability. The reduced peak current also lessens the high stress on switching devices with desirable reliability. The simulation and experiment results of an MMC-based motor drive prototype prove the effectiveness and superiority of the proposed method. [ABSTRACT FROM AUTHOR]

The analysis of circulating current in modular multilevel converter (MMC) has aroused extensive research interests recently. Most studies on the derivation of harmonic components of circulating current neglect the harmonics in the line currents, but the harmonics evidently distort the line currents in many MMC applications where a circulating path for the dominant third-order harmonic current exists. So far, little research has been done on the model of the harmonics in line currents of MMC and neglecting them inevitably causes large error in the previous analytical expressions of circulating current. To solve these problems, this paper proposes a novel accurate steady-state mathematical model of harmonic components existing both in arm and line currents, and presents the detailed relations between the inner and outer harmonic characteristics of MMC. Thus, the derived instantaneous voltages and currents both in arm and line from the proposed models are far more accurate than the present research. What's more, each existing higher order harmonic is precisely calculated for the first time, filling up the blank of the conventional studies, and providing a better reference for the understanding, designing, and controlling of the MMC engineering applications. The correctness and high accuracy of the proposed models are verified by simulation results in PSCAD/EMTDC. [ABSTRACT FROM AUTHOR]

Grid synchronization has always been an important challenge for grid-connected converters under extremely distorted grid conditions. Moreover, how to quickly and accurately extract multiple required harmonics is also essential for control systems. In this paper, two types of generalized delayed signal superposition (GDSS) operators capable of extracting any arbitrary harmonic component out of an input signal are derived. In order to show the benefits of GDSS operators, a new grid information estimation concept based on multiple GDSS operators (referred to as MGDSS-PLL) is proposed to track the fundamental and multiple targeted harmonics under single-phase and three-phase adverse grid conditions. MGDSS-PLL can be flexibly tuned to extract any harmonic components according to specific requirements within one fundamental period, and it also exhibits great robustness to grid disturbances. Simulations and experimental results are presented for verifying the performance of the MGDSS-PLL. [ABSTRACT FROM PUBLISHER]

This paper proposes a novel high-order passive filter, i.e., series-parallel-resonant LCL (SPRLCL) filter, for single-phase half-bridge active power filters. The proposed SPRLCL filter consists of a series resonance introduced by adding a small inductor to the capacitor branch loop and a parallel resonance by paralleling a small capacitor with the gird-side inductor. Three design methods are proposed to fine tune the parameters of the SPRLCL filter. Design method I and method II enable the SPRLCL filter to attenuate more switching-frequency and double switching-frequency current harmonics than LCL or LLCL filters, while with design method III, the SPRLCL filter can be more robust against filter parameter variations. In order to achieve a better damping performance and facilitate the design of active damping control, the dominant resonance frequency of the proposed filter is set at one-third of the system sampling frequency. Based on this, a comprehensive parameter design process of the SPRLCL filter is presented, where the variation of source inductance is also considered. A proportional plus repetitive current-loop controller is designed to ensure system control stability and satisfactory harmonic compensation. Simulation and experimental results are finally presented to validate the feasibility of the theoretical analysis. [ABSTRACT FROM AUTHOR]

The unified power quality conditioner (UPQC) is known as an effective compensation device to improve PQ for sensitive end-users. This paper investigates the operation and control of a single-phase three-leg UPQC (TL-UPQC), where a novel space vector modulation method is proposed for naturally solving the coupling problem introduced by the common switching leg. The modulation method is similar to the well-known space vector modulation widely used with three-phase voltage source converters, which thus brings extra flexibility to the TL-UPQC system. Two optimized modulation modes with either reduced switching loss or harmonic distortion are derived, evaluated, and discussed, in order to demonstrate the flexibility brought by the space vector modulated TL-UPQC. Simulations and experimental results are presented to verify the feasibility and effectiveness of the proposed space vector modulation approach as well as two mentioned modulation modes. [ABSTRACT FROM PUBLISHER]

The bifurcation behavior of a digitally controlled H-bridge grid-connected inverter is studied in this paper. The discrete-time model of this time-varying system is derived for inherent time delay in a digitally controlled system. Theoretical analyses indicate that only Hopf bifurcation can take place when the system loses its stability. The analytical expression of oscillation frequency is also derived in this paper. Moreover, the stability and instability boundaries for all switching cycles within a line cycle are described by analytical expressions. Finally, the theoretical results are verified by numerical simulations, circuit simulations and experimental measurements. These aforementioned conclusions provide an insight into the design process of the inverter system in terms of stability behavior and instability phenomenon. [ABSTRACT FROM AUTHOR]

This paper presents a simplified discrete-time modeling method for digital-controlled switching power converters. Reserving the utility of fast-scale dynamics analysis, the method introduces state-space average technique into the conventional discrete-time modeling scheme. Compared to the conventional discrete-time models, the simplified models have almost the same reliability and accuracy in stability prediction in most practical applications. In addition, they also lend themselves more convenient to digital control design than do the exact discrete-time models due to their obvious simplicity. Taking a current-mode-controlled boost dc–dc converter and a digital-controlled single-phase full-bridge dc–ac inverter as practical examples, the simplified modeling approach is validated by simulations and experiments. [ABSTRACT FROM AUTHOR]

In this paper, a unified "scalar" discrete-time model is proposed for enhanced bifurcation prediction in digitally controlled H-bridge grid-connected inverter system. The model is established by analytically expressing the elements of the matrix exponential involved in the exact discrete-time model. In high-order system, different from the discrete-time model using the state-transition matrix directly, obtaining the discrete-time model of the state-variable vector only, in this system, the discrete-time model of each state variable can be obtained directly and separately. In addition, the stability boundary of Hopf bifurcation, period-doubling bifurcation and saddle-node bifurcation can be obtained by analytical expressions. The modeling method is validated by an LCL-filter system as an example using practical circuit parameters. The results of the analysis can simplify the modeling process and enhance the bifurcation prediction of the digitally controlled inverter system. [ABSTRACT FROM AUTHOR]

Symmetric discrete-event systems (DESs) are composed of groups of identical components (machines) and buffers. As every component in each group has the same structure, they can be relabeled to a prototype machine. With respect to buffer specifications (prohibiting overflow and underflow) it is shown that optimal supervisory control of the original DES (with many machines) can be reduced to control of the much smaller collection of prototype machines. With buffer sizes fixed, the result is a small invariant supervisor which is independent of the total number of original machines. We analyze the underlying reason for this invariance property and apply the result of the invariant reduced supervisor to efficient reconfiguration triggered by the addition or removal of machines and increase or decrease of the buffer capacity. [ABSTRACT FROM AUTHOR]