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The shift towards a human-centered society promotes greater interconnectedness between people and the digital space. Modern devices such as displays and sensors in which thin-film transistors (TFT) are key materials have crucial roles in the next-generation society because displays are used as both information terminals and interface for human-device interactions while sensors gather data. Furthermore, there is growing interest in neuromorphic devices which aim to mimic the human brain’s efficiency in simultaneously processing and memorizing information to address the von Neumann bottleneck pervasive in modern computing architecture [1]. Amorphous oxide semiconductors (AOS) have gained attention as excellent materials for TFT [2], memory [3], sensing [4], and neuromorphic [5] applications for their superb combination of electrical performance and transparency. Currently, AOS devices are still mainly fabricated using vacuum process. To achieve high throughput and cost-effective production of numerous ubiquitous devices necessary in the next-generation society, an alternative fabrication process is needed. Solution process is an exceptional candidate because of its: (i) efficient production with cost-effective equipment, (ii) large material utilization (low waste) since it can be an additive process compared to vacuum process (high waste), and (iii) low temperature processability for flexible applications in healthcare, energy, and electronics. However, solution process still has major issues such as inferior performance and reliability compared with vacuum process. Several processes have been developed to address these issues but are mostly focused on improving performance and usually limited to a single solution processed device layer – the channel or gate insulator [6]. Thus, many still opt for vacuum process or a single solution processed layer as a compromise. For truly high throughput fabrication, all device layers should be fabricated by solution process. In reality, fully solution-processed TFTs are challenging to fabricate, have dismal performance (mobility (μ) < 1 cm2/Vs), and poor reliability. Therefore, high temperature (>400 °C) process and exotic materials are required for decent μ 2/Vs which precludes their use in high performance flexible device applications [7]. Here, we present how photo-assisted methods through UV treatment and excimer laser annealing (ELA) can selectively transform AOS regions at low substrate temperatures [8]. Consequently, a single AOS film acts as both the semiconductor channel and conducting electrode to realize fully solution processed TFTs with μ of ~40 cm2/Vs (see Fig. 1) [9]. We also show how alternative methods can be used to enhance the performance and stability of fully solution processed TFTs on rigid/flexible substrates. In particular, how low temperature processes such as light, plasma, and material design of functional materials enable high throughput solution processing of flexible electronic devices. Acknowledgment This research was supported by JSPS Kakenhi Grant no. 22K14291. References [1] J. von Neumann, IEEE Ann. Hist. Comput. 15, 27 (1993). [2] K. Nomura et al. Nature 432, 488–492 (2004). [3] C. H. Kim et al Appl. Phys. Lett. 97, 062109 (2010) [4] R. Jaisutti et al ACS Appl. Mater. Interfaces 8, 20192–20199 (2016) [5] M. Lee et al Adv. Mater. 29, 1700951 (2017) [6] J. W. Park et al Adv. Funct. Mater. 30, 1904632 (2020). [7] S. J. Lee et al ACS Appl. Mater. Interfaces 8, 12894 (2016) [8] J. P. Bermundo et al ACS Appl. Mater. Interfaces 10, 24590 (2018) [9] D. Corsino et al ACS Appl. Electron. Mater., 2, 2398 (2020) Figure 1

Amorphous oxide semiconductors are intensively studied nowadays due to its excellent material characteristics, such as high mobility, high optical transparency, large area uniformity, and low processing temperature which enable flexible device application [1]. Solution approach is a promising method over conventional vacuum process, because of its simplicity and versatility with high material utilization which can minimize fabrication cost [2]. To optimize for application in flexible substrates, reduction of process temperatures to oC is an important requirement. Plasma treatment can be used to modify thin-film properties and device characteristics by modulating carrier concentration and density of oxygen vacancies [3]. Argon plasma treatment can improve reliability, as carbon concentration on the surface can be reduced, and oxidation enhancement on the surface can be achieved. This research aims to study the effect of plasma treatment on the stability of fully solution processed amorphous Indium Zinc Oxide (a-IZO) thin-film transistor (TFT). Our fully solution processed a-IZO TFTs were fabricated with a self-aligned top gate structure at a maximum fabrication temperature of 300oC. Initially, IZO precursor was spin-coated on Si/SiO2 substrate. Then, fluorinated-polysilsesquioxane (F-PSQ) was deposited with a thickness of ~200 nm which act as a gate-insulator, followed by an IZO layer to be transformed as conducting electrode after treatment. Self-aligned patterning, gate etching, and gate insulator etching were then performed. Lastly, Argon plasma treatment is performed via inductively coupled plasma (ICP), using reactive ion etching SAMCO 10-ip equipment for 5 seconds at room temperature with an ICP power, bias power, and working pressure of 300 W, 100 W, and 5 Pa, respectively. The Argon flow rate was also varied at 100, 75, and 50 sccm. The IZO TFT without plasma treatment was denoted as-fabricated sample. After plasma treatment, exposed IZO layers transform as source/drain and gate. TFT structure before and after plasma treatment can be seen in Fig. 1. Film surface morphology was studied using atomic force microscopy. As Argon concentration increased, the exposed IZO surface became rougher. We also checked the transfer characteristics, performed cyclic measurement, and bias stress tests. Transfer characteristics of TFTs with 90µm width and 10µm length were examined at several drain voltages (Vd = 0.1 V, 5.0 V, and 9.9 V) by a semiconductor parameter analyzer. Transfer curves for as-fabricated and after Ar-75 plasma treatment are shown in Fig 1. As-fabricated sample shows poor switching characteristics because of inactivated source/drain and gate electrodes. After plasma treatment, TFTs show superb characteristics which possibly happened because of changes in the metal-oxide bond formation which increased the conductivity in exposed area. The mobility significantly increased to 31.12 cm2/Vs, with a Vth= -0.3 V and subthreshold swing of 0.28 V/dec for Ar-75 sccm. TFT yield was evaluated by measuring 8 TFTs for each sample. Average mobility for Ar-50, Ar-75, and Ar-100 is 20.30 cm2/Vs, 22.93 cm2/Vs, and 19.88 cm2/Vs, respectively. The mobility increase corresponded to the thin-film quality improvement caused by change in VO and surface roughness [4]. However, excessive Argon gas flow also tend to make samples more conductive. To investigate device stability, positive bias stress (PBS, stress V g= 10 V) and negative bias stress (NBS, stress V g= -10 V) was performed for 2,000s. Lower on-current for all samples were observed as bias stress duration increased. A threshold voltage shift (∆Vth) for Ar-50, Ar-75, and Ar-100 of 0.2 V, -0.3 V, and 0.6 V, respectively after PBS, and 1.4 V, 2.9 V, and 0.7 V, respectively after NBS was observed. We expect that improvement via plasma treatment is due to two main factors. First, ion bombardment caused surface improvement and activated the electrode. Second, the chemical reaction induced by plasma treatment changed the metal-oxide bonds formation [5-6]. Thus, fully solution-processed a-IZO TFT with high mobility up to 31.12 cm2/Vs was achieved by Ar-75 plasma treatment, which also led to better stability under bias stress. These results show that performance enhancement of fully-solution processed a-IZO TFT by plasma treatment has a large potential for future low-temperature flexible device applications. Acknowledgment: This research was supported by JSPS Kakenhi Grant no. 22K14291. The authors thank Nissan Chemical Corporation for providing the IZO precursor solution. References: [1] T. Kamiya, et al., Sci technol. Adv. Matter. 11, 044305 (2010) [2] W. Xu, et al., ACS Appl. Mater. Interfaces 10 (31), 25878 (2018) [3] W. S. Liu, et al., Semicond. Sci. Technol. 36, 045007 (2021) [4] W. S. Liu, et al., Membranes 12, 49 (2022) [5] J. S. Park, et al., Appl. Phys. Lett. 90, 262106 (2007) [6] Z.W. Shang, et al., J Mater Sci. 56, 6286 (2021) Figure 1

We investigated the liquid-phase growth of silicon-germanium (SiGe) epitaxial layers formed on Si substrates by a simple and rapid process of screen-printing of Al-Ge paste followed by high temperature annealing. Aluminum (Al) and germanium (Ge) (7:3) mixed paste was prepared, screen-printed on a Si substrate and annealed in an infra-red (IR) furnace at peak temperatures between 800°C to 1000°C. After reaching the Al melting point at 660°C, the melted Al dissolves the Si surface and Ge powder in the paste forming a thick liquid phase of melted Al-Ge-Si layer on the dissolved surface of the Si substrate. During the cooling process, a SiGe layer starts to grow epitaxially at the Si interface. The formed SiGe was observed by scanning electron microscope (SEM), and energy dispersive X-ray spectrometry (EDX) and characterized by X-ray diffraction reciprocal space mapping (XRD-RSM). The thickness of the SiGe layer depended on the peak temperature reaching about 25mm at 1000oC. The results suggest the epitaxially grown SiGe is strain-relaxed with a graded Ge concentration.

A mixed paste of aluminum (Al) and germanium (Ge) (7:3) was prepared and screen-printed on silicon (Si) substrates, followed by annealing at a peak temperature of 1000 °C in an IR rapid thermal annealing furnace to investigate the liquid-phase growth of silicon–germanium (SiGe) epitaxial layers. The gas ambient during annealing was changed to investigate the effect on SiGe layer quality and physical properties. The SiGe formed samples were observed by scanning electron microscopy and energy dispersive X-ray spectroscopy. Oxygen-containing atmosphere suppressed the SiGe layer formation by oxidizing the Al particle surface, limiting the reaction of the particle to the Si surface. On the other hand, annealing in an argon atmosphere without oxygen resulted in the formation of SiGe layers with a thickness of over 30 μm.

Continuous-wave laser crystallization of amorphous Si (a-Si) thin films on a polyimide (PI)-coated glass substrate is studied by using a single scan of a highly uniform top-flat line-beam with a 123 nm SiO2 cap layer and a thin buffer layer at room temperature in air. The total buffer layer thickness is reduced to as thin as 1.55 μm including the heatsink a-Si layer and two SiO2 layers. Damage to the polyimide during the crystallization is successfully suppressed by the heatsink layer. An 88.3% {100} surface fraction is obtained for a 60-nm-thick Si thin film within 15° on polyimide even with a low scan velocity of 15 mm/s.

Herein, enhancements in thermoelectric (TE) performance, both the power factor (PF) and thermal stability, are exhibited by sandwiching HfO2 and TiO2 layers onto atomic layer deposited-ZnO thin films. High-temperature TE measurements from 300 to 450 K revealed an almost two-fold improvement in electrical conductivity for TiO2/ZnO (TZO) samples, primarily owing to an increase in carrier concentration by Ti doping. On the other hand, HfO2/ZnO (HZO) achieved the highest PF values owing to maintaining Seebeck coefficients comparable to pure ZnO. HZO also exhibited excellent stability after multiple thermal cycles, which has not been previously observed for pure or doped ZnO thin films. Such improvement in both TE properties and thermal stability of HZO can be attributed to a shift in crystalline orientation from the a axis to c axis, as well as the high bond dissociation energy of Hf-O, stabilizing the ZnO structure. These unique properties exhibited by HZO and TZO thin films synthesized by atomic layer deposition pave the way for next-generation transparent TE devices.

We report the enhancement in the electrical performance of solution-processed amorphous InZnO ( $a$ -IZO) thin-film transistors (TFTs) through incorporation of low-temperature photosensitive polysilsesquioxane (P-PSQ) passivation. P-PSQ passivated TFTs recorded smaller ${V}_{th}$ shift of 1.5 V after positive bias stress test despite annealing at 180°C. Analysis of secondary ion mass spectrometry and x-ray photoelectron spectroscopy showed that higher concentration of hydrogen reduced the amount of oxygen vacancies in the passivated IZO channel which promotes better stability against bias stress. Also, the time evolution of the ${V}_{th}$ was defined in which the activation energy for each sample was extracted. Passivated TFT also showed minimal change upon exposure to humidity test. Overall, low-temperature P-PSQ passivation is an effective barrier against atmospheric effects for solution-processed oxide TFTs.

A mechanism of potential induced degradation (PID) delay effect by ultraviolet (UV) light irradiation during PID test for p-type crystalline silicon (c-Si) solar cells was proposed in this work. The degradation rate of the solar cell performances is slowed down by the UV light irradiation in the 300–390 nm wavelength range during PID test. The conductivity increase of the silicon nitride (SiNx) anti-reflection coating (ARC) layer on the solar cell surface under UV light irradiation during PID tests, which relates to the mechanism preventing the penetration of sodium ions into the active cell layer, induces the PID delay effect for the p-type c-Si solar cells. The PID delay effect was also analyzed by a microwave photo-conductance decay (μ-PCD) technique in this work. The reduction behavior of the components in the μ-PCD signal curves including rapid (τ1) and slow (τ2) decay time constants and the effective lifetime (τeff) presents a good correlation with the performance degradation behavior of the solar cells over PID test duration. Moreover, the reduction rate of these components is also slowed down under the UV light irradiation in the 300–390 nm wavelength range during PID tests. Notably, their reduction behavior was compatible with the mechanism of the conductivity increase of the SiNx ARC layer under UV light irradiation.

We report a chemical sensor that exhibits high reliability and long-term stability; this is achieved by employing an amorphous oxide semiconductor (AOS) as a channel material in an extended-gate th...

Herein, a core–shell heterostructure of H2O-oxidized ZnO nanorod (NR)@Mg-doped ZnO (MZO) nanoparticles (NP) with superior charge transfer capabilities is presented for the first time. ZnO NRs were strategically designed using a low-temperature and sustainable H2O oxidation technique and followed by low-temperature annealing of a spin-coated MZO precursor to form a core–shell heterostructure. Surface morphological and nanobeam electron diffraction (NBD) analysis validated the high-quality crystalline nature of the core–shell heterostructure. The verification of Mg dopant inclusion in the ZnO lattice and uniform distribution were established from X-ray (XRD, XPS, EDX), Raman and electron energy-loss (EELS) spectroscopy analyses. The ZnO NR@MZO NP core–shell film preserved the excellent transparency of the original ZnO NRs and displayed the highest conductivity due to the increased carrier concentration in the MZO shell. Steady-state photoluminescence (PL) intensity of the perovskite film on top of the ZnO NR@MZO NP core–shell film showed the strongest quenching among the samples indicating the fastest electron transfer. This ZnO NR@MZO NP core–shell heterostructure could provide a more efficient transmission channel by supplying a larger electronic contact with the light absorber layer and a direct path for electron transport to the cathode. Ultimately, our results highlight the great potential of the ZnO NR@MZO NP core–shell structure as an electrode not only for photovoltaics but also in other future flexible optoelectronic devices.

We conducted X-ray photoelectron spectroscopy (XPS) and first-principles calculations based on density functional theory (DFT) to confirm the presence of Ga2O sub-oxide in high-pressure water vapor annealed AlGaN surface. We note that the Ga 3d XPS peak broadens and shifts towards higher binding energies, which suggests surface oxide formation. Deconvoluted Ga 3d XPS profiles between HPWVA-treated and reference samples reveal reasonable inclusion of Ga2O peak, suggesting formation of Ga2O sub-oxide. To theoretically confirm the presence of Ga2O, we calculated the Ga 3d core-level shift using initial state approximation. We obtained a 0.74 eV shift, in reasonable agreement with that of Ga2O. Moreover, based on the calculation of net charge on Ga using DFT, we also obtained a +1 oxidation state for Ga, indicating its existence in Ga2O form. By combining theory and experiment, therefore, we have explored the possibility of the formation of Ga2O sub-oxide, which may provide new avenues for obtaining highly stable operation in GaN-based devices.

This research investigated the optical properties of silicon-rich silicon nitride (Si-rich SiN) and conventional silicon nitride (SiNx) layers, which are commonly used in anti-reflective coating (ARC) to improve the light absorption in solar cells. We found that the change in the refractive index of Si-rich SiN was due to the annealing temperature that was considerably higher than that of conventional SiNx. In addition to the mass density variation in the SiNx layer that generally governed the change of refractive index in previous studies, this study found another important factor influencing the change of the refractive index. The Si–N bond, which was the main component in SiNx controlled the refractive index, while the amount of Si-Si bond in Si-rich SiN after annealing governed the change of the refractive index. The structural analysis presented for the Si-rich SiN and the SiNx explained the effect of the annealing process on tuning the refractive index of the Si-rich SiN.