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SIMD (Single Instruction Multiple Data) extensions are acceleration components integrated in general processor, aiming at extracting instruction and data level parallelism of multimedia and scientific calculation programs. Currently, most of the automatic vectorization methods for SIMD architectures are based on innermost loops. Inner loop vectorization is the common approach for auto-vectorization. This method has been used for many years and its efficiency is widely accepted by people. In this paper, we put forward a better method than inner loop vectorization for some loop nests, which is outer loop vectorization. Outer loop vectorization method means vectorizing the outer loop directly. It can extract more data level parallelism and make the most use of the spatial locality to improve the program efficiency than the inner one which is more suitable for some loop nests. This paper presents the realization. In this paper, we first revisit the preliminary analysis of outer loop vectorization based on Open64 complier. And then, data type conversion and code generation is presented in detail. Finally, we propose two optimization methods, capable of boosting the performance of outer loop vectorization to achieve the acceleration of 20% on average, 50% at most.

Nowadays more and more processors are integrated with SIMD extensions, and many compilers have applied auto-vectorization. SLP is an vectorization algorithm that could vectorize scientific applications more effectively than traditional algorithm. However, if basic blocks have not vectorized efficiently by SLP then the vectorization performance will degrade. To solve that problem this paper brings SLP that applied recovery methodology. The algorithm adopts SLP algorithm to vectorize program and then esitimate the vectorization benifit based cost model, at last recover the basic blocks that haven’t vectorized efficiently to their original states. Experiment results indicate that with the adoption of the new policy, the speedup gain for some applications can reach 29.4%.

Regular expression matching is a key technology of network security. Around this issue, one of the regular expression patterns in real rule sets called counting constraint pattern is analyzed in this paper. Besides, the complex characteristics of counting constrain pattern syntax and the problems of state explosion lead by patterns composition are studied. Based on the analysis of the limitations of existing matching algorithms, aimed at the multiple counting constraint pattern composition, a papilionaceous automata applied to deep packet inspection is proposed. The results show that the compression ratio could reach 94.86% in Linux L7-filter rule sets, and for the majority of Bro rule sets and Snort rule sets, the compression ratio could up to 99%.

With the rapidly development of virus technology, the number of malicious code has continued to increase. So it is imperative to optimize the traditional manual analysis method by automatic maliciousness decision system. Motivated by the inference technique for detecting viruses, and a recent successful classification method, we explore Radux-an automatic software maliciousness decision system. It rests on artificial neural network based on behavior hidden in malicious code. Decompile technique is applied to characterize behavioral and structural properties of binary code, which creates more abstract descriptions of malware. Experiment shows that this system can decision software maliciousness efficiently.

Discontinuous references to memory and misalignment of memory access mode can have great impact on program performance in auto-vectorization. Different target-specific architecture may have different influence on vectorization performance. As a popular technology in recent years, the multimedia extension technique is important in the vectorization field. Supported by special processing unit in microprocessors, the SIMD automatic vectorization become available. Compiler targeted to SIMD has been widely used in research. This article has proposed a cost analytical model in automatic vectorization compiler. Based on the analysis of several important factors which impact the performance, this model combining with the SLP technique, evaluates both benefit and cost during vectorization and exists as a guidance to vectorization. Experimental results indicate that to some extent this model can accurately predict benefits for vectorization and guide compiler optimization.

The conventional approach for describing bill of material (BOM) as a tabular structure implemented within a relational database system makes it difficult for the generic bills of material (GBOM) in a customer-oriented production, where the number of variants may go into high numbers. This research presents a novel XML-based approach to represent generic bill of material (GBOM), entities that represent and maintain one generic structure that encompasses all variants of a product. This approach combines a produce-oriented notation and gives further a high degree of flexibility to support the user in the product variant specification task. The generic BOM system is then introduced for the particular product variant, and a prototype system has been developed. Finally, conclusion and future works are discussed.

Minimizing communication by increasing the locality of data references is an important optimization for achieving high performance on distributed memory machines. But in the progress of decomposition, reorganization is inevitable. And the communication produced by reorganization is inevitable too. In this paper, the authors present a linear decomposition algorithm that automatically finding computation and data decomposition, including finding data and computations decomposition that has data reorganization communication. And the authors improve the method and reduce the communication cost by merging parallel regions with the same data decomposition.

Environmental bisimulation method is an important relation in the Spi calculus, which is usually used to reason about interactive systems. In this paper we adopted it in analyzing network protocols and intended to try it on checking the soundness of the Kerberos protocol. Rigorous proofs on its two security properties reveal that the authenticity property holds while its secrecy property is threatened by a possible attack.

Computer networks provide an increasing number of services that require complex processing of packets, for example firewalls, load balancing, network storage, and TCP/IP offloading. Such services require the use of powerful network processors to provide the necessary performance and flexibility. But NPs also introduce new challenges. It is important to study the performance of NP system so that one can take full advantage of NP resources to achieve the required performance for a given application. It is therefore desirable to develop a framework for analyzing performance of NP-based applications. The framework divides the network processor system into four levels, and incorporates Petri net, AD AG and a new analysis method- "line space" to evaluate NP-based system performance, which simplifies the complexity of multilevel parallel system performance evaluation and insures its efficiency and precision. We apply our methodology to an Intel's reference design, and show that the analytical results using our method match the experimental results from actual implementation.

In this work, we present a new methodology to calculate the available compute budget which determines how much processing the network processor can perform on each packet with different length. To evaluate the method, we also did a wide range of tests with different length packets. Then we analysis the MicroEngine states with the test results, which is useful in building the applications on network processors and evaluating its performance. We also give several solutions to solving the applications' performance bounds such as latency bound and compute bound, which are caused by variable length packets.

Aiming at the limitations of benchmark tools, the paper brings a model, which is beneficial for NP-based application design, and which ought to be obeyed on the four levels of system, function, task and hardware. Then five formulas are given specifically for Intel NPbased application design. In the third part, an study case and it’s testing result are given with these disciplines and formulas applied. Finally the paper points out under which circumstances can these formulas be applied.