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Abstract In order to fulfill the complex cognitive behaviors in neuromorphic systems with reduced peripheral circuits, the reliable electronic synapses mimicked by single device that achieves diverse long‐term and short‐term plasticity are essential. Phase change random access memory (PCRAM) is of great potential for artificial synapses, which faces, however, difficulty to realize short‐term plasticity due to the long‐lasting resistance drift. This work reports the ruthenium‐doped Ge2Sb2Te5 (RuGST) based PCRAM, demonstrating a series of synaptic behaviors of short‐term potentiation, pair‐pulse facilitation, long‐term depression, and short‐term plasticity in the same single device. The optimized RuGST electronic synapse with the high transformation temperature of hexagonal phase >380°C, the outstanding endurance >108 cycles, the low resistance drift factor of 0.092, as well as the extremely high linearity with correlation coefficients of 0.999 and 0.976 in parts of potentiation and depression. Further investigations also go insight to mechanisms of Ru doping according to thorough microstructure characterization, revealing that Ru dopant is able to enter GST lattices thus changing and stabilizing atomic arrangement of GST. This leads to the short‐term plasticity realized by RuGST PCRAM. Eventually, the proposed RuGST electronic synapses performs a high accuracy of ~94.1% in a task of image recognition of CIFAR‐100 database using ResNet 101. This work promotes the development of PCRAM platforms for large‐scale neuromorphic systems.

Abstract Phase change materials have issues in the automotive industry and in‐memory computing due to their limited thermal stability and high power consumption. Consequently, numerous studies are conducted to enhance the performance of these materials. Uncertainty persists regarding the effects and mechanisms of various doping on the parent material. In this study, four metallic doping elements are selected, and their effects on Sb2Te3 are meticulously analyzed through experiments and ab initio calculations. The thermal stability of Sb2Te3 has been somewhat enhanced by doping these four elements, with Ta doping having the most impact. According to the ab initio molecular dynamics, this improvement results from the tetrahedral centered In and the increased coordination numbers of Ta, Ti, and Sc. Sc located at the center of the octahedron can accelerate the crystallization process. Ta, in particular, exerts the greatest influence on the migration rates of Sb and Te, resulting in the slowest grain growth rate. Simultaneously, it maximizes the delay in the transition from the cubic phase to the hexagonal phase. These features are beneficial for reducing power consumption. The elucidation of the distinct effects of doping elements sets the stage for phase change memory to adapt to various application scenarios.

Abstract Three-dimensional phase change memory (3D PCM), possessing fast-speed, high-density and nonvolatility, has been successfully commercialized as storage class memory. A complete PCM device is composed of a memory cell and an associated ovonic threshold switch (OTS) device, which effectively resolves the leakage current issue in the crossbar array. The OTS materials are chalcogenide glasses consisting of chalcogens such as Te, Se and S as central elements, represented by GeTe6, GeSe and GeS. Among them, GeSe-based OTS materials are widely utilized in commercial 3D PCM, their scalability, however, has not been thoroughly investigated. Here, we explore the miniaturization of GeSe OTS selector, including functional layer thickness scalability and device size scalability. The threshold switching voltage of the GeSe OTS device almost lineally decreases with the thinning of the thickness, whereas it hardly changes with the device size. This indicates that the threshold switching behavior is triggered by the electric field, and the threshold switching field of the GeSe OTS selector is approximately 105 V/μm, regardless of the change in film thickness or device size. Systematically analyzing the threshold switching field of Ge–S and Ge–Te OTSs, we find that the threshold switching field of the OTS device is larger than 75 V/μm, significantly higher than PCM devices (8.1–56 V/μm), such as traditional Ge2Sb2Te5, Ag–In–Sb–Te, etc. Moreover, the required electric field is highly correlated with the optical bandgap. Our findings not only serve to optimize GeSe-based OTS device, but also may pave the approach for exploring OTS materials in chalcogenide alloys.

Highlights The development history and key milestones of ovonic threshold switch (OTS) materials were comprehensively summarized. Combined with the latest advancements of OTS research, the mainstream OTS material systems were systematically introduced. A thorough overview of the prevailing viewpoints regarding the OTS switching mechanisms was presented. Recent progress in OTS devices for applications in 3D memory, self-selecting memory, and neuromorphic computing was summarized.

The stability of slurries used for chemical mechanical polishing (CMP) is a crucial concern in industrial chip production, influencing both the quality and cost-effectiveness of polishing fluids. In silicon wafer polishing, the conventional use of commercial neutral silica sol combined with organic bases often leads to slurry instability. To address this issue, this study proposes organic amines—specifically ethanolamine (MEA), ethylenediamine (EDA), and tetramethylammonium hydroxide (TMAOH)—as catalysts for synthesizing alkaline silica sol tailored for silicon wafer polishing fluids. Sol–gel experiments and zeta potential measurements demonstrate the efficacy of this approach in enhancing the stability of silica sol. The quantitative analysis of surface hydroxyl groups reveals a direct correlation between enhanced stability and increased hydroxyl content. The application of the alkaline silica sol in silicon wafer polishing fluids improves polishing rates and enhances surface flatness according to atomic force microscopy (AFM). In addition, electrochemical experiments validate the capability of this polishing solution to mitigate corrosion on silicon wafer surfaces. These findings hold significant implications for the advancement of chemical mechanical polishing techniques in the field of integrated circuit fabrication.

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Abstract The disorder‐to‐order (crystallization) process in phase‐change materials determines the speed and storage polymorphism of phase‐change memory devices. Only by clarifying the fine‐structure variation can the devices be insightfully designed, and encode and store information. As essential phase‐change parent materials, the crystallized Sb–Te binary system is generally considered to have the cationic/anionic site occupied by Sb/Te atoms. Here, direct atomic identification and simulation demonstrate that the ultrafast crystallization speed of Sb–Te materials is due to the random nature of lattice site occupation by different classes of atoms with the resulting octahedral motifs having high similarity to the amorphous state. It is further proved that after atomic ordering with disordered chemical occupation, chemical ordering takes place, which results in different storage states with different resistance values. These new insights into the complicated route from disorder to order will play an essential role in designing neuromorphic devices with varying polymorphisms.

Abstract Arsenic is an essential dopant in conventional silicon-based semiconductors and emerging phase-change memory (PCM), yet the detailed functional mechanism is still lacking in the latter. Here, we fabricate chalcogenide-based ovonic threshold switching (OTS) selectors, which are key units for suppressing sneak currents in 3D PCM arrays, with various As concentrations. We discovered that incorporation of As into GeS brings >100 °C increase in crystallization temperature, remarkably improving the switching repeatability and prolonging the device lifetime. These benefits arise from strengthened As-S bonds and sluggish atomic migration after As incorporation, which reduces the leakage current by more than an order of magnitude and significantly suppresses the operational voltage drift, ultimately enabling a back-end-of-line-compatible OTS selector with >12 MA/cm2 on-current, ~10 ns speed, and a lifetime approaching 1010 cycles after 450 °C annealing. These findings allow the precise performance control of GeSAs-based OTS materials for high-density 3D PCM applications.

Silicon carbide, a third-generation semiconductor material, is widely used in the creation of high-power devices. In this article, we systematically study the influence of three crucial parameters on the polishing rate of a silicon carbide surface using orthogonal experiments. By optimizing the parameters of chemical mechanical polishing (CMP) through experiments, we determined that the material removal rate (MRR) is 1.2 μm/h and the surface roughness (Ra) is 0.093 nm. Analysis of the relevant polishing mechanism revealed that manganese dioxide formed during the polishing process. Finally, due to the electrostatic effect of the two, MnO2 adsorbed on the Al2O3, which explains the polishing mechanism of Al2O3 in the slurry.

Developing scalable strategies of miniaturization and integration is key for achieving high-density integrated circuit devices. Here, the authors propose a silicon-based one-transistor device with a 40% reduction in circuit footprint, which combines the functionalities of logic gates, memory, and artificial synapses for mass production.

Hardware electronic synapse and neuro-inspired computing system based on phase change random access memory (PCRAM) have attracted an extensive investigation. However, due to the intrinsic asymmetric reversible phase transition, the defective weight update of PCRAM synapses in aspects of tuning range, linearity and continuity has long required a system-level complexity of circuits and algorithms. The cell-level improvements to a great extent may slim the system thus achieving efficient computing. We report in this work the great enhancement of Ge2Sb2Te5 (GST) based PCRAM synapses by combining materials engineering and pulse programming. It is found that carbon doping in GST retards the rate of phase changing thus increasing the controllability of the conductance, while non-linear programmable pulse excitations can eventually lead to a reliable synaptic potentiation and depression. A set of improved programmable pulse schemes for spike-timing dependent plasticity was then demonstrated, suggesting its potential superiority in flexible programming and reliable data collection. Our methods and results are of great significance for implementing PCRAM electronic synapses and high-performance neuro-inspired computing.

A high-precision current-mode bandgap reference (BGR) circuit with a high-order temperature compensation is presented in this paper. In order to achieve a high-precision BGR circuit, the equation of the nonlinear current has been modified and the high-order term of the current flowing into the nonlinear compensation bipolar junction transistor (NLCBJT) is compensated further. According to the modified equation, two solutions are designed to improve the output accuracy of BGR circuits. The first solution is to divide the NLCBJT branch into two branches to reduce the coefficient of the nonlinear temperature compensation current. The second solution is to inject the nonlinear current into the two branches based on the first one to further eliminate the temperature coefficient (TC) of the current flowing into the NLCBJT. The proposed BGR circuit has been designed using the Semiconductor Manufacturing International Corporation (SMIC) 55 nm CMOS process. The simulation results show that the variations in currents flowing into NLCBJTs improved from 148.41 nA to 69.35 nA and 7.4 nA, respectively, the TC of the output reference current of the proposed circuit is approximately 3.78 ppm/°C at a temperature range of −50 °C to 120 °C with a supply voltage of 3.3 V, the quiescent current consumption of the entire BGR circuit is 42.13 μA, and the size of the BGR layout is 0.044 mm2, leading to the development of a high-precision BGR circuit.

In phase-change memory, writing speed and data retention are two seemingly conflicting performances. Here the authors report hierarchical melt and coordinate bond strategies to stabilize a medium-range crystal-like region and amorphous region, respectively.

Abstract Phase‐change memory (PCM) has been developed for three‐dimensional (3D) data storage devices, posing huge challenges to the thermal stability and reliability of PCM. However, the low thermal stability of Ge2Sb2Te5 (GST) limits further application. Here, we demonstrate PCM based on In0.9Ge2Sb2Te5 (IGST) alloy, showing 180°C 10‐years data retention, 6 ns set speed, one order of magnitude longer life time, and 75% reduced power consumption compared to GST‐based device. The In can occupy the cationic positions and the In‐Te octahedrons with good phase‐change properties can geometrically match well with the host Ge‐Te and Sb‐Te octahedrons, acting as nucleation centers to boost the set speed and enhance the endurance of IGST device. Introducing stable matched phase‐change octahedrons can be a feasible way to achieve practical PCMs.

Abstract Nonvolatile phase‐change random access memory (PCRAM) is regarded as one of the promising candidates for emerging mass storage in the era of Big Data. However, relatively high programming energy hurdles the further reduction of power consumption in PCRAM. Utilizing narrow edge‐contact of graphene can effectively reduce the active volume of phase change material in each cell, and therefore realize low‐power operation. Here, it demonstrates that the power consumption can be reduced to ≈53.7 fJ in a cell with ≈3 nm‐wide graphene nanoribbon (GNR) as edge‐contact, whose cross‐sectional area is only ≈1 nm2. It is found that the polarity of the bias pulse determines its cycle endurance in the asymmetric structure. If a positive bias is applied to the graphene electrode, the endurance can be extended at least one order longer than the case with a reversal of polarity. In addition, the introduction of the hexagonal boron nitride (h‐BN) multilayer leads to a low resistance drift and a high programming speed in a memory cell. The work represents a great technological advance for the low‐power PCRAM and can benefit in‐memory computing in the future.

As information technology is moving toward the era of big data, the traditional Von-Neumann architecture shows limitations in performance. The field of computing has already struggled with the latency and bandwidth required to access memory (“the memory wall”) and energy dissipation (“the power wall”). These challenging issues, such as “the memory bottleneck,” call for significant research investments to develop a new architecture for the next generation of computing systems. Brain-inspired computing is a new computing architecture providing a method of high energy efficiency and high real-time performance for artificial intelligence computing. Brain-inspired neural network system is based on neuron and synapse. The memristive device has been proposed as an artificial synapse for creating neuromorphic computer applications. In this study, post-silicon nano-electronic device and its application in brain-inspired chips are surveyed. First, we introduce the development of neural networks and review the current typical brain-inspired chips, including brain-inspired chips dominated by analog circuit and brain-inspired chips of the full-digital circuit, leading to the design of brain-inspired chips based on post-silicon nano-electronic device. Then, through the analysis of N kinds of post-silicon nano-electronic devices, the research progress of constructing brain-inspired chips using post-silicon nano-electronic device is expounded. Lastly, the future of building brain-inspired chips based on post-silicon nano-electronic device has been prospected.

Multi-agent systems are suitable for handling complex problems due to their high parallelism and autonomous evolution ability. In this paper, we propose an adaptive clustering multi-agent learning system for intelligent applications with continuously changing requirements. Each agent model changes temporal sequences using the longest common subsequence (LCS) algorithm. Multiple agents collaborate in a multilayer decentralized approach to enhance learning adaptability and achieve self-supervised behavioral clustering. The system is constructed using a “memory-like” method and operates primarily on memory access and comparison, avoiding extensive matrix operations of artificial neural networks while achieving learning and prediction functions. We chose an unsupervised vehicle behavioral clustering scenario for feasibility validation in which the system’s cognitive objective is to cluster and recognize vehicle behaviors. In a low computational environment, the system can complete clustering functions and exhibit continuous learning capabilities when new behavioral changes occur. The proposed approach achieves an accuracy of 97.4% while processing at a speed 1–5 times faster than similar clustering algorithms. The verification results indicate that this system has excellent potential to enhance intelligent sensing front ends.

Video behavior recognition often needs to focus on object motion processes. In this work, a self-organizing computational system oriented toward behavioral clustering recognition is proposed, which achieves the extraction of motion change patterns through binary encoding and completes motion pattern summarization using a similarity comparison algorithm. Furthermore, in the face of unknown behavioral video data, a self-organizing structure with layer-by-layer accuracy progression is used to achieve motion law summarization using a multi-layer agent design approach. Finally, the real-time feasibility is verified in the prototype system using real scenes to provide a new feasible solution for unsupervised behavior recognition and space-time scenes.

Abstract Phase-change memory (PCM) has considerable promise for new applications based on von Neumann and emerging neuromorphic computing systems. However, a key challenge in harnessing the advantages of PCM devices is achieving high-speed operation of these devices at elevated temperatures, which is critical for the efficient processing and reliable storage of data at full capacity. Herein, we report a novel PCM device based on Ta-doped antimony telluride (Sb2Te), which exhibits both high-speed characteristics and excellent high-temperature characteristics, with an operation speed of 2 ns, endurance of > 106 cycles, and reversible switching at 140 °C. The high coordination number of Ta and the strong bonds between Ta and Sb/Te atoms contribute to the robustness of the amorphous structure, which improves the thermal stability. Furthermore, the small grains in the three-dimensional limit lead to an increased energy efficiency and a reduced risk of layer segregation, reducing the power consumption and improving the long-term endurance. Our findings for this new Ta–Sb2Te material system can facilitate the development of PCMs with improved performance and novel applications.

High density phase change memory array requires both minimized critical dimension (CD) and maximized process window for the phase change material layer. High in-wafer uniformity of the nanoscale patterning of chalcogenides material is challenging given the optical proximity effect (OPE) in the lithography process and the micro-loading effect in the etching process. In this study, we demonstrate an approach to fabricate high density phase change material arrays with half-pitch down to around 70 nm by the co-optimization of lithography and plasma etching process. The focused-energy matrix was performed to improve the pattern process window of phase change material on a 12-inch wafer. A variety of patternings from an isolated line to a dense pitch line were investigated using immersion lithography system. The collapse of the edge line is observed due to the OPE induced shrinkage in linewidth, which is deteriorative as the patterning density increases. The sub-resolution assist feature (SRAF) was placed to increase the width of the lines at both edges of each patterning by taking advantage of the optical interference between the main features and the assistant features. The survival of the line at the edges is confirmed with around a 70 nm half-pitch feature in various arrays. A uniform etching profile across the pitch line pattern of phase change material was demonstrated in which the micro-loading effect and the plasma etching damage were significantly suppressed by co-optimizing the etching parameters. The results pave the way to achieve high density device arrays with improved uniformity and reliability for mass storage applications.

The selector is an indispensable section of the phase change memory (PCM) chip, where it not only suppresses the crosstalk, but also provides high on-current to melt the incorporated phase change material. In fact, the ovonic threshold switching (OTS) selector is utilized in 3D stacking PCM chips by virtue of its high scalability and driving capability. In this paper, the influence of Si concentration on the electrical properties of Si-Te OTS materials is studied; the threshold voltage and leakage current remain basically unchanged with the decrease in electrode diameter. Meanwhile, the on-current density (Jon) increases significantly as the device is scaling down, and 25 MA/cm2 on-current density is achieved in the 60-nm SiTe device. In addition, we also determine the state of the Si-Te OTS layer and preliminarily obtain the approximate band structure, from which we infer that the conduction mechanism conforms to the Poole-Frenkel (PF) model.

Phase change memory (PCM), a typical representative of new storage technologies, offers significant advantages in terms of capacity and endurance. However, among the research on phase change materials, thermal stability and switching speed performance have always been the direction where breakthroughs are needed. In this research, as a high-speed and good thermal stability material, Ta was proposed to be doped in Sb3Te1 alloy to improve the phase transition performance and electrical properties. The characterization shows that Ta-doped Sb3Te1 can crystallize at temperatures up to 232 °C and devices can operate at speeds of 6 ns and 8 × 104 operation cycles. The reduction of grain size and the density change rate (3.39%) show excellent performances, which are both smaller than that of Ge2Sb2Te5 (GST) and Sb3Te1. These properties conclusively demonstrate that Ta incorporation of Sb3Te1 alloy is a material with better thermal stability and faster crystallization rates for PCM applications.

As a new generation of non-volatile memory, phase change random access memory (PCRAM) has the potential to fill the hierarchical gap between DRAM and NAND FLASH in computer storage. Sb2Te3, one of the candidate materials for high-speed PCRAM, has high crystallization speed and poor thermal stability. In this work, we investigated the effect of carbon doping on Sb2Te3. It was found that the FCC phase of C-doped Sb2Te3 appeared at 200 °C and began to transform into the HEX phase at 25 °C, which is different from the previous reports where no FCC phase was observed in C-Sb2Te3. Based on the experimental observation and first-principles density functional theory calculation, it is found that the formation energy of FCC-Sb2Te3 structure decreases gradually with the increase in C doping concentration. Moreover, doped C atoms tend to form C molecular clusters in sp2 hybridization at the grain boundary of Sb2Te3, which is similar to the layered structure of graphite. And after doping C atoms, the thermal stability of Sb2Te3 is improved. We have fabricated the PCRAM device cell array of a C-Sb2Te3 alloy, which has an operating speed of 5 ns, a high thermal stability (10-year data retention temperature 138.1 °C), a low device power consumption (0.57 pJ), a continuously adjustable resistance value, and a very low resistance drift coefficient.

Ge2Sb2Te5 (GST) is the most important material for phase change random access memory (PCRAM) applications, while the formation of hexagonal (h-) phase results in low switching speed, large energy consumption, and worse endurance performance. Uncovering the formation mechanism of h-phase is beneficial for the further improvement of GST-based PCRAM devices. In this work, through advanced spherical aberration corrected transmission electron microscopy and transmission electron back-scattered diffraction technique, the mechanism of h-phase microstructure evolution is clearly clarified. We find that the vacancy ordering is more likely to appear around the grain boundary in a face-centered-cubic (f-) phase grain, which is the starting point for the generation of h-phase. More specifically, all the atoms in f-phase undergo a gradual shift into h-lattice positions to complete the f-to-h structural transition. By introducing an elemental dopant, for instance, carbon (C), the aggregation of C clusters prefers to distribute in the grain boundary area, which is the essential reason for postponing the generation and expansion of h-phase and greatly improving the thermal stability of C-GST material. In short, clarification of the origin of h-structure incubated from f-phase guides the optimization strategy of GST-based PCRAM devices.

Designing efficient selector devices for large-scale nonvolatile memory and neuromorphic array systems remains a challenge. Here, the authors propose a two-terminal ovonic threshold switching selector device with a large drive current density and a high nonlinearity, capable emulating stochastic integrate-and-fire neuron behavior.

Ge2Sb2Te5 (GST) is the typical phase change material (PCM) that can reversibly transform between the amorphous (a) and crystalline (c) states. Because the optical properties are phase-dependent, GST has been widely used in various photonic applications, such as optical switches and non-volatile memories. Currently, the photonic applications of the GST PCM have been demonstrated by employing lasers in visible and infrared wavelengths. Extending the photonic applications into other wavelengths is much demanded. Here, we investigate the phase change of the GST material illuminated by using a terahertz quantum cascade laser emitting around 2.5 THz. A finite-element simulation is employed to study the temperature and transmission changes induced by terahertz irradiation. It reveals that the phase change can be achieved and the transmission is reduced by 30% when the GST material is irradiated by the 2.5 THz laser light. Furthermore, a z-scan technique experimentally presents the phase change behaviors of GST illuminated by the terahertz light, which is visually proved by transmission electron microscopy. Our work paves a way for the applications of GST materials in the terahertz optical components, e.g., modulators and switches.

In this paper, a fast-transient-response NMOS low-dropout regulator (LDO) with a wide load-capacitance range was presented to provide a V/2 read bias for cross-point memory. To utilize the large dropout voltage in the V/2 bias scheme, a fast loop consisting of NMOS and flipped voltage amplifier (FVA) topology was adopted with a fast transient response. This design is suitable to provide a V/2 read bias with 3.3 V input voltage and 1.65 V output voltage for different cross-point memories. The FVA-based LDO designed in the 110 nm CMOS process remained stable under a wide range of load capacitances from 0 to 10 nF and equivalent series resistance (ESR) conditions. At the capacitor-less condition, it exhibited a unity-gain bandwidth (UGB) of approximately 400 MHz at full load. For load current changes from 0 to 10 mA within an edge time of 10 ps, the simulated undershoot and settling time were only 144 mV and 50 ns, respectively. The regulator consumed 70 µA quiescent current and achieved a remarkable figure-of-merit (FOM) of 1.01 mV. At the ESR condition of a 1 µF off-chip capacitor, the simulated quiescent current, on-chip capacitor consumption, and current efficiency at full load were 8.5 µA, 2 pF, and 99.992%, respectively. The undershoot voltage was 20 mV with 800 ns settling time for a load step from 0 to 100 mA within the 10 ps edge time.

A fully integrated low-dropout (LDO) regulator with improved load regulation and transient responses in 40 nm technology is presented in this paper. Combining adjustable threshold push–pull stage (ATPS) and master–slave power transistors topology, the proposed LDO maintains a three-stage structure within the full load range. The proposed structure ensures the steady-state performance of LDO and achieves 0.017 mV/mA load regulation. The ATPS consumes little quiescent current at light load current condition, and the turn-on threshold of the ATPS can be adjusted by a current source. Once the value of current source is set, the turn-on threshold is also determined. A benefit of the proposed structure is that the LDO can be stable from 0 to 100 mA load current with a maximum 100 pF parasitic load capacitance and a 0.7 pF compensation capacitor. It also shows good figure of merit (FOM) without an extra transient enhanced circuit. For the maximum 100 mA load transient with 100 ns edge time, the undershoot and overshoot are less than 33 mV. The dropout voltage of the regulator is 200 mV with input voltage of 1.1 V. The total current consumption of the LDO was 24.6 μA at no load.

A novel output-capacitorless low-dropout regulator (OCL-LDO) with an embedded slew-rate-enhancement (SRE) circuit is presented in this paper. The SRE circuit adopts a transient current-boost strategy to improve the slew rate at the gate of the power transistor when a large voltage spike at the output is detected. In addition, a feed-forward transconductance cell is introduced to form a push–pull output structure with the power transistor. The simulation results show that the maximum transient output voltage variation is 23.5 mV when the load current ILOAD is stepped from 0 to 100 mA in 100 ns with a load capacitance of 100 pF, and the settling time is 1.2 μs. The proposed OCL-LDO consumes a quiescent current of 30 μA and has a dropout voltage of 200 mV for the maximum output current of 100 mA.

Quantitative imaging on the doping in phase-change materials for data storage remains scarce. Here, the authors combine electron microscopy, atom probe tomography, and simulations to determine the role of indium and silver dopants during recrystallization.

Selector is considered as a promising solution to solve sneak-path current for high-density 3-Dimensional (3D) memories. However, bidirectional selector with fast speed and long lifetime is still extremely needed. In this work, 2D material of graphene oxide containing epoxide, hydroxyl and carboxyl (-COOH, -OH, >C=O) is assembled with HfO2 to form a flexible bi-layer selector. Interestingly, the selector exhibits excellent uniformity, fast switching speed (~160 ns) and remarkable endurance of ~5×108 cycles. Moreover, no performance degradation is observed for more than 103 times with the bending radii ranging from 40 mm to 20 mm. The high uniformity and excellent endurance may be attributed to the insulating interface layer at the HfO2/GO interface, which plays a vital role on the connection/disrupt of conductive filament (CF). Thus, the incorporation of GO into HfO2 selector may be a feasible way to achieve a promising HfO2-based selector, which have potential applications in high-density 3D integration for flexible electronics.

Phase change memory (PCM), due to the advantages in capacity and endurance, has the opportunity to become the next generation of general−purpose memory. However, operation speed and data retention are still bottlenecks for PCM development. The most direct way to solve this problem is to find a material with high speed and good thermal stability. In this paper, platinum doping is proposed to improve performance. The 10-year data retention temperature of the doped material is up to 104 °C; the device achieves an operation speed of 6 ns and more than 3 × 105 operation cycles. An excellent performance was derived from the reduced grain size (10 nm) and the smaller density change rate (4.76%), which are less than those of Ge2Sb2Te5 (GST) and Sb2Te3. Hence, platinum doping is an effective approach to improve the performance of PCM and provide both good thermal stability and high operation speed.

Abstract Phase change random access memory (PCRAM) has gained much attention as a candidate for nonvolatile memory application. To develop PCRAM materials with better properties, especially to draw closer to dynamic random access memory (DRAM), the key challenge is to research new high-speed phase change materials. Here, Scandium (Sc) has been found it is helpful to get high-speed and good stability after doping in Sb2Te alloy. Sc0.1Sb2Te based PCRAM cell can achieve reversible switching by applying even 6 ns voltage pulse experimentally. And, Sc doping not only promotes amorphous stability but also improves the endurance ability comparing with pure Sb2Te alloy. Moreover, according to DFT calculations, strong Sc-Te bonds lead to the rigidity of Sc centered octahedrons, which may act as crystallization precursors in recrystallization process to boost the set speed.

Based on the standard 40 nm Complementary Metal Oxide Semiconductor (CMOS) process, a curvature compensation technique is proposed. Two low-voltage, low-power, high-precision bandgap voltage reference circuits are designed at a 1.2 V power supply. By adding IPTAT (positive temperature coefficient current) and ICTAT (negative temperature coefficient current) to the output resistance, the first-order compensation bandgap voltages can be obtained. Meanwhile, the third high-order compensation current is also superimposed on the same resistance. We make use of the collector current of the bipolar transistor to compensate for the nonlinear term of VBE. The simulation results show that TC (temperature coefficient) of the first circuit reference could be reduced from 29.1 × 10−6/°C to 5.71 × 10−6/°C over the temperature range of −25 to 125 °C after temperature compensation. The second one could be reduced from 17 × 10−6/°C to 5.22 × 10−6/°C.

Multilevel storage and the continuing scaling down of technology have significantly improved the storage density of phase change memory, but have also brought about a challenge, in that data reliability can degrade due to the resistance drift. To ensure data reliability, many read and write operation technologies have been proposed. However, they only mitigate the influence on data through read and write operations after resistance drift occurs. In this paper, we consider the working principle of multilevel storage for PCM and present a novel 2T2R structure circuit to increase the storage density and reduce the influence of resistance drift fundamentally. To realize 3-bit per cell storage, a wide range of resistances were selected as different states of phase change memory. Then, we proposed a 4:3 compressing encoding scheme to transform the output data into binary data states. Therefore, the designed 2T2R was proven to have optimized storage density and data reliability by monitoring the conductance distribution at four time points (1 ms, 1 s, 6 h, 12 h) in 4000 devices. Simulation results showed that the resistance drift of our proposed 2T2R structure can significantly improve the storage density of multilevel storage and increase the data reliability of phase change memory.

Computing-In-Memory (CIM), based on non-von Neumann architecture, has lately received significant attention due to its lower overhead in delay and higher energy efficiency in convolutional and fully-connected neural network computing. Growing works have given the priority to researching the array of memory and peripheral circuits to achieve multiply-and-accumulate (MAC) operation, but not enough attention has been paid to the high-precision hardware implementation of non-linear layers up to now, which still causes time overhead and power consumption. Sigmoid is a widely used non-linear activation function and most of its studies provided an approximation of the function expression rather than totally matched, inevitably leading to considerable error. To address this issue, we propose a high-precision circuit implementation of the sigmoid, matching the expression exactly for the first time. The simulation results with the SMIC 40 nm process suggest that the proposed circuit implemented high-precision sigmoid perfectly achieves the properties of the ideal sigmoid, showing the maximum error and average error between the proposed simulated sigmoid and ideal sigmoid is 2.74% and 0.21%, respectively. In addition, a multi-layer convolutional neural network based on CIM architecture employing the simulated high-precision sigmoid activation function verifies the similar recognition accuracy on the test database of handwritten digits compared to utilize the ideal sigmoid in software, with online training achieving 97.06% and with offline training achieving 97.74%.

In order to improve the electrical performance of resistive random access memory (RRAM), sulfur (S)-doping technology for HfOx-based RRAM is systematically investigated in this paper. HfOx films with different S-doping contents are achieved by atmospheric pressure chemical vapor deposition (APCVD) under a series of preparation temperatures. The effect of S on crystallinity, surface topography, element composition of HfOx thin films and resistive switching (RS) performance of HfOx-based devices are discussed. Compared with an undoped device, the VSET/VRESET of the S-doped device with optimal S content (~1.66 At.%) is reduced, and the compliance current (Icc) is limited from 1 mA to 100 μA. Moreover, it also has high uniformity of resistance and voltage, stable endurance, good retention characteristics, fast response speed (SET 6.25 μs/RESET 7.50 μs) and low energy consumption (SET 9.08 nJ/RESET 6.72 nJ). Based on X-ray photoelectron spectroscopy (XPS) data and fitting of the high/low resistance state (HRS/LRS) conduction behavior, a switching mechanism is considered to explain the formation and rupture of conductive filaments (CFs) composed of oxygen vacancies in undoped and S-doped HfOx-based devices. Doping by sulfur is proposed to introduce the appropriate concentration oxygen vacancies into HfOx film and suppress the random formation of CFs in HfOx-based device, and thus improve the performance of the TiN/HfOx/ITO device.

The thermoelectric generator (TEG) stands out among many energy harvesters due to its simple structure, small size, rich thermal energy, and the absence of pollution and noise. However, previous studies have rarely probed into the influence of TEG internal resistances on extracting maximum power from TEGs, and the tracking of efficiency is limited. By analyzing the relationship between the tracking efficiency and the TEG internal resistances, a time exponential rate perturbation and observation (P&O) technology is proposed to achieve maximum power point tracking (MPPT) for a wide resistance range of the TEG. Using the time exponential rate P&O, the MPPT circuit observed the power change by comparing the positive-channel metal-oxide semiconductor (PMOS) on-time and perturbs the power by adjusting the negative-channel metal-oxide semiconductor (NMOS) on-time exponentially. The MPPT circuit was implemented in a 110 nm complementary metal-oxide semiconductor (CMOS) process. The tracking efficiency maintained a high level from 98.9 to 99.5%. The applicable range of the TEG resistance was from 1 to 12 Ω, which reflects an enhancement of at least 2.2 times.

Abstract Phase change memory (PCM) is a promising nonvolatile memory to reform current commercial computing system. Inhibiting face-centered cubic (f-) to hexagonal (h-) phase transition of Ge2Sb2Te5 (GST) thin film is essential for realizing high-density, high-speed, and low-power PCM. Although the atomic configurations of f- and h-lattices of GST alloy and the transition mechanisms have been extensively studied, the real transition process should be more complex than previous explanations, e.g. vacancy-ordering model for f-to-h transition. In this study, dynamic crystallization procedure of GST thin film was directly characterized by in situ heating transmission electron microscopy. We reveal that the equilibrium to h-phase is more like an abnormal grain growth process driven by surface energy anisotropy. More specifically, [0001]-oriented h-grains with the lowest surface energy grow much faster by consuming surrounding small grains, no matter what the crystallographic reconfigurations would be on the frontier grain-growth boundaries. We argue the widely accepted vacancy-ordering mechanism may not be indispensable for the large-scale f-to-h grain growth procedure. The real-time observations in this work contribute to a more comprehensive understanding of the crystallization behavior of GST thin film and can be essential for guiding its optimization to achieve high-performance PCM applications.

Phase change memory (PCM) formed by Ge2Sb2Te5 (GST) on vertical carbon nanotube (CNT) filled contact plug is demonstrated in this paper. In order to achieve compatibility with the underlying process, the CNTs are synthesized using nickel catalyst at a low temperature. Reasonable contact characteristics between the CNTs and GST are achieved without material compatibility problem. Due to the small contact size of the CNT to the phase change material, a significant reduction in programming power is achieved compared to metal contact at the same via size. The temperature simulation result shows that the CNT filled via helps to reduce the programming area. The fabricated PCM on CNT filled via is able to endure more than 104 SET/RESET cycles without observable degradation.

The local structure change of Ge induced by carbon doping in as-deposited Ge2Sb2Te5 films were studied by extended X-ray absorption fine structure and Raman spectrum. Ge-C bonds are formed at the expense of reducing the coordination of Ge-Ge and Ge-Te bonds, and make the local structure of Ge to be a well-defined tetrahedral geometry, which increases the rigidity of amorphous network and reduces the number of ABAB rings, thus the crystallization temperature of carbon-doped Ge2Sb2Te5 (CGST) films are enhanced. The reduced proportion of the tetrahedral units GeTe4−nGen (n = 1, 2) caused by carbon doping accounts for the weaker Raman peak intensity at ∼124 cm−1 in CGST films. Meanwhile, the impact of doping carbon on the crystalline structure of CGST films were investigated by high resolution transmission electron microscope.

Multi-level cell (MLC) phase change memory (PCM) can not only effectively multiply the memory capacity while maintaining the cell area, but also has infinite potential in the application of the artificial neural network. The write and verify scheme is usually adopted to reduce the impact of device-to-device variability at the expense of a greater operation time and more power consumption. This paper proposes a novel write operation for multi-level cell phase change memory: Programmable ramp-down current pulses are utilized to program the RESET initialized memory cells to the expected resistance levels. In addition, a fully differential read circuit with an optional reference current source is employed to complete the readout operation. Eventually, a 2-bit/cell phase change memory chip is presented with a more efficient write operation of a single current pulse and a read access time of 65 ns. Some experiments are implemented to demonstrate the resistance distribution and the drift.

The Er3+ doped Bi5TiNbWO15 ceramics have been synthesized using conventional solid-state reaction techniques. The crystal structure, ferroelectric properties, UC emission properties and especially the temperature sensing behaviors were systematically studied. With increasing Er3+ content, the investigation of XRD pattern, the ferroelectric loop and the UC emission indicated that the Er3+ ions dopants preferentially substituted the A sites of Bi3TiNbO9 and then Bi2WO6. Based on fluorescence intensity ratio (FIR) technique, the observed results implied the ceramics were promising candidates for temperature sensors in the temperature range of 175 K −550 K. More importantly, this study provided a contrast of temperature sensitivity between emission from the same part (Bi3TiNbO9) in bismuth layered-structure and emission from the different part (Bi3TiNbO9 and Bi2WO6) in bismuth layered-structure for the first time.