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18,305 results on '"phase-locked loop"'

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1. A Current-Mode-Logic-Based PFD–Charge Pump Circuit for Low-Reference Spur PLLs

3. Synchronization in PLL Networks: Numerical Simulations Using Julia.

4. 弱电网下单相并网逆变器频率耦合消除与稳定性增强方法.

5. Novel Power-Efficient Fast-Locking Phase-Locked Loop Based on Adaptive Time-to-Digital Converter-Aided Acceleration Compensation Technology.

6. Transient Synchronous Stability Analysis of Grid-Following Converter Considering Outer-Loop Control with Current Limiting.

7. Transient Synchronous Stability Modeling and Comparative Analysis of Grid-Following and Grid-Forming New Energy Power Sources.

8. Doppler Parameters Estimation Using Digital PLL Based on SWIFT & αSWIFT Structures.

9. 基于龙伯格观测器的 PMSM 双矢量模型预测控制.

10. Frequency-adaptive DLIA–PLL-based current harmonic compensation for single-phase grid-interfaced inverters.

11. Adaptive QSMO-Based Sensorless Drive for IPM Motor with NN-Based Transient Position Error Compensation.

12. A new transient phenomenon caused by active current dynamics of grid-following converters during severe grid faults.

13. Performance analysis of fractional‐order modified SRF PLL under grid abnormalities.

14. Predictive direct power control with phase‐locked loop technique of three‐level neutral point clamped inverter based shunt active power filter for power quality improvement.

15. A PLL-Based Doppler Method Using an SDR-Receiver for Investigation of Seismogenic and Man-Made Disturbances in the Ionosphere.

16. A Compact, Low-Power, and Low-Jitter Fractional-N Phase-Locked Loop with a Single-Ended Ring Voltage-Controlled Oscillator in a 12 nm CMOS FinFET.

18. Design and Implementation of High Precision Clock Synchronization for LEO Constellation Based on GNSS

19. Transient Stability Analysis of Grid Following Converter Intergreted with Synchronous Generator

20. Resolver-To-Digital Conversion and Sensor Fault Identification of PMSM

23. Study on Double Phase-Locked Loop on the Synthetic Inertia Control of Offshore Wind Farm Frequency Regulation

24. A low-power 10Gb/s CMOS clock and data recovery circuit with a quarter-rate phase detector.

25. Broadband High-Linear FMCW Light Source Based on Spectral Stitching.

26. 基于双锁相环的海上风场综合惯量调频策略研究.

27. Linear Variable Differential Transformer Signal Conditioning Circuit Based on Phase-Locked Loop.

28. A Simplified G m − C Filter Technique for Reference Spur Reduction in Phase-Locked Loop.

29. 基于同步采样 SDFT 的高性能单相锁相环 方法研究.

30. Single-step auto-tuning of external active damping control strategy for a drill-string speed-controlled electrical drive.

31. A new transient phenomenon caused by active current dynamics of grid-following converters during severe grid faults

32. Rotational Reference Frame Control of DFIG-Based Wind Turbines for Inertial Frequency Response

33. Discrete-Time Models and Performance of Phase Noise Channels

37. A control method for the single-phase three-leg unified power quality conditioner without a phase-locked loop.

38. 基于 RTDS 的直驱风机硬件在环实验方法.

39. Advanced Single-Phase PLL-Based Transfer Delay Operators: A Comprehensive Review and Optimal Loop Filter Design.

40. Repetition Frequency Control of a Mid-Infrared Ultrashort Pulse Laser.

41. A novel time delay‐based phase‐locked loop with improved anti‐harmonic interference performance for grid synchronization.

42. An Ultra Low Power Integer-N PLL with a High-Gain Sampling Phase Detector for IOT Applications in 65 nm CMOS.

43. A 1.8 V 25 Mbps CMOS single-phase, phase-locked loop-based BPSK, QPSK demodulator.

44. Single-phase binary phase-shift keying, quadrature phase shift keying demodulators using an XOR gate as a phase detector.

45. Stability analysis of grid-connected photovoltaic generation control system under DC voltage timescale

46. Stability analysis of hybrid synchronization controller based grid forming control

47. A PLL-Based Doppler Method Using an SDR-Receiver for Investigation of Seismogenic and Man-Made Disturbances in the Ionosphere

48. Second Harmonic-Compensated Phase-Locked Loop for Resolver-to-Digital Conversion

50. Synthesis of PLL in Capture Mode with a Fuzzy Controller of Quasi-Optimal Structure Based on the Maximum Condition of the Generalized Power Function

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