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Light controlled phased array has the advantages of fast response speed, compact system, diverse functions, and flexible control, and has been widely applied in many scientific and technological fields. Optical true delay technology (OTTD) is the most direct technical means to achieve phase delay of optical carrier signals, and it is also the most basic technical means to implement optical controlled beamforming systems. In order to fully understand the optical true delay technology, this article first elaborates on the principle of phased array antennas and the reasons for beam squint, and analyzes the impact of true delay on the performance of phased array radar. Then, the basic principle, technological progress, and related applications of optical true delay are introduced. Taking four common structures of optical true delay lines as examples, which are micro-ring resonant cavity array, grating true time delay line, multi-path switchable optical true time delay line (OTTDL), and wavelength selective optical delay line, their performance in delay accuracy, adjustable delay range, and frequency bandwidth are compared. Finally, the current problems and future development trends of optical controlled beamforming technology were summarized.

$N$ -path true time delay (TTD) circuits are highly attractive due to their high delay-bandwidth product, wideband response, scalability, and small size. However, in its standalone form, it cannot provide wideband input and output matching. To overcome these issues, we present a modified circuit of the $N$ -path TTD that includes an input low-noise amplifier (LNA) and an output buffer. The $N$ -path TTD response and its nonideal properties are analyzed further. A design guide is suggested, and an alternative isolated sampling switch is proposed. We present a 65-nm CMOS dedicated implementation, where the fine-tuning of the TTD is achieved by introducing two synchronized external local oscillator (LO) signals, with a relative shift between them. The core chip size is $0.32 \,\times \,0.575$ mm2, and its power consumption is 30 mW for all delay states. In our implementation, we achieve a delay range of 1 ns for bandwidth (BW) of 0.2–3 GHz with a gain standard deviation (STD) of less than 0.14 dB between delay states and a relative delay STD of less than 10 ps (1%) over frequency. [ABSTRACT FROM AUTHOR]

An ultrawideband (UWB) transmitarray antenna (TA) using receiving–transmitting scheme is presented in this letter. The TA overcomes its narrowband limitations by combining UWB radiators and integrated grounded coplanar transmission polylines. To reduce the manufacturing cost and the assembly complexities, all metallic components of the TA element are printed on a vertically oriented single-layer substrate, leading to a lightweight and solderless slat structure. The proposed TA element achieves true-time-delay phase responses over a fractional bandwidth of 116%, i.e., from 4.2 to 15.8 GHz, with maximum transmission loss of 1.6 dB at normal incidence. The dimensions of the designed 21 × 21 element TA aperture are 189 × 189 × 28 mm3, corresponding to 10 × 10 × 1.47λh3, where λh is the free-space wavelength at the highest operating frequency. A prototype is manufactured and measured to validate the feasibility. The experimental results agree reasonably well with simulations. [ABSTRACT FROM AUTHOR]

Wideband self-interference cancellation (SIC) in full-duplex (FD) radios requires the achievement of large delays to accurately emulate the SI channel. However, compact, power-efficient, low-loss/noise/distortion nanosecond-scale delays are extremely challenging to achieve on silicon. Passive transmission lines on silicon are lossy and area-intensive and exhibit reduced bandwidths when miniaturized using inductors and capacitors, whereas active approaches are noisy and power-hungry. In this work, we present a technique that leverages switched-capacitor circuits with multiphase clocking to obtain large on-chip delays over wide bandwidths with the low area and power consumption, thus exceeding the delay–bandwidth product (DBW) limits offered by conventional linear time-invariant (LTI) circuits. This technique is demonstrated in an FD receiver with time-interleaved switched-capacitor-based delay cells in RF and BB domains. The FD receiver is implemented in a standard 65-nm CMOS process and operates from 100 MHz–1 GHz with gain tunability of 15–38 dB, a noise figure of 5.4 dB, and power consumption of 31 mW. The RF/BB canceler delay cells have real-/complex-valued weighting with delays ranging from 0.2–1.1 ns/10–75 ns while consuming 25.5 and 6.5 mW, respectively. These large tunable delays perform FIR-filtering-based cancellation, enabling 30–35-dB integrated SI cancellation over 20 MHz on top of an off-the-shelf ferrite circulator when terminated by a dipole antenna (isolation of 22 dB), and can handle TX power of up to +9 dBm. Under SIC, the RF and BB cancelers degrade the RX noise figure by 1.1 and 0.8 dB, respectively. [ABSTRACT FROM AUTHOR]

This work proposes and demonstrates the scalable router array that eliminates the internal centralization of conventional arrays, unlocking scalability, and the potential for a system composed of spatially separated elements that do not share a common timing reference. Architectural variations are presented, and their specific tradeoffs are discussed. The general operation, steering capabilities, signal and noise considerations, and timing control advantages are evaluated through analysis, simulation, and measurements. An element-level CMOS radio frequency integrated circuit (RFIC) is developed and used to demonstrate a four-element 25 GHz prototype router. The RFIC’s programmable true time delay (TTD) control is used to correct path-length-difference-induced intersymbol interference (ISI) and improve a rerouted 270-Mb/s 64-QAM constellation from a completely scrambled state to an EVM of 4% rms (−28 dB). The prototype scalable router’s concurrent dual-beam capabilities are demonstrated by simultaneously steering two full power beams at 24.9 and 25 GHz in two different directions in a free-space electromagnetic setup. [ABSTRACT FROM AUTHOR]

Integrated true-time-delay (TTD) cells for RF frequencies are usually large and have high relative delay variation. Here, the $N$ -path TTD topology is explored, where the signal is undersampled with a number of parallel S/H circuits and reconstructed and summed after a given time delay. This topology allows the improvement of the delay-bandwidth (DBW) limit and provides minimum variation in time delay while requiring relatively small area and power. The effect of the TTD is analyzed with a linear periodic time-variant mathematical model and is verified through simulations and measurements. Measurements of 65-nm CMOS chip implementation show up to 2-ns delay for a bandwidth of 400 MHz with maximum delay variation over frequency of 10 ps and power consumption of 9.6 mW. [ABSTRACT FROM AUTHOR]

A 5-bit switched-line true time delay (TTD) circuit is proposed based on 0.25-μm GaAs pHEMT technology. The delay structure within the TTD units is formed by employing second-order all-pass networks (APNs). A double-pole double-throw (DPDT) switch is specifically designed to replace the conventional cascading of two single-pole double-throw (SPDT) switches, thus, minimizing the insertion loss introduced by the switches. To mitigate insertion loss fluctuation across different states, several π-type resistive attenuators are incorporated into the reference line. This configuration enables a maximum delay of 199.75 ps, a delay resolution of 6.45 ps, and simultaneously maintains a low delay error within 4.6 ps. The measured average insertion loss is 14.8 dB with a loss error below 3 dB, and the in/out return loss is better than −12 dB at 4–20 GHz. [ABSTRACT FROM AUTHOR]

This paper presents a new technique to design switchable true time delay (TTD) lines using periodic shunt open-stubs, shorter than a quarter wavelength at the highest frequency of interest. Structural parameters are obtained by minimizing the group delay variation and maximizing the return loss over the operating band. Advantages of the proposed design are low insertion loss, higher 1 dB compression point, and less number of switches compared to the conventional designs. To verify the proposed technique, 2-states and 8-states TTD lines are fabricated for L- and S-band applications. For the 8-states delay networks, measured insertion losses are smaller than 1.9 dB at 3 GHz. Return losses are more than 10 dB over 1–4 GHz band. Measured maximum time delay is 84 ps for the 8-states delay lines with a step size of 10 ps. All the TTDs operate as linear device at least up to 23 dBm. [ABSTRACT FROM AUTHOR]

Abstract A fully integrated 4-channel beamformer based on TTD phased array is proposed in this paper. This architecture is especially suitable for MIMO systems which can increase throughput by improving multiplexing gain. A path-sharing true time delay (TTD) unit by using analog CMOS filter circuits is presented to realize flat time delay over 0.35–1 GHz. Compared to traditional MIMO architectures, highly multiplexed TTD reduces chip area and power consumption. The proposed beamformer can provide maximum scan angle of up to ±45°for four antennas with 10.5 cm spacing. The measurement results show that maximum delay is almost consistent with simulated results. Input signals from the same direction which reach different antennas, are delayed a different fixed time difference through different TTD units and have same phase at the output, realizing signal enhancement. The whole beamformer chip consumes 130 mA from a 1.8 V DC power supply, and has a total chip area of 4.65 mm × 4.30 mm. [ABSTRACT FROM AUTHOR]

This paper presents a monolithic microwave integrated circuit multifunction chip implemented using a 0.25- \mu \textm gallium arsenide pseudomorphic high-electron-mobility transistor process for use in a phased array jammer transmitter. This chip, which operates in the frequency range of 6–18 GHz, provides several functions including 8-bit true time delay (TTD), 7-bit attenuation, wideband amplification, and digital serial-to-parallel conversion for 15-bit control. The TTD and attenuation coverage are 255 ps with a step of 1 ps and 31.75 dB with a step of 0.25 dB, respectively. The TTD employing an artificial transmission line configuration demonstrates a root-mean-square delay error of less than 1.7 ps in the operating frequency range. The chip has a compact size of 4\,\,\ mm \times 5 mm and exhibits a typical gain of 12 dB and an output P1dB of 16.5 dBm over a frequency range of 6–18 GHz. [ABSTRACT FROM PUBLISHER]

This paper presents an accurate method for synthesis of true time delay (TTD) reflecting elements to design wideband reflectarray (RA) antennas. In doing so, primarily the conventional phase distribution formulation of RA is modified to accommodate the design of resonant reflecting elements based on TTD technique. An accurate circuit model is then presented to realize the linear reflection coefficient phase of the reflecting elements of the RA antenna using the continued fraction theory. Finally, the equivalent circuit models of reflecting elements are implemented via multilayer frequency selective-surface structures. The RA antenna is designed and fabricated to operate in the X-band frequency. Stable aperture phase efficiency of about 80% and stable radiation patterns throughout the operating frequency band, confirm the accuracy of the proposed method. [ABSTRACT FROM PUBLISHER]

This paper reviews the topic of true time delay (TTD) and its importance and implications in wideband imaging phased arrays. The paper describes an early analog version of TTD using the “Rotman lens,” discusses various architectures, and talks about photonic implementations. Also emphasized are the differences in design between narrowband arrays which are calibrated at individual frequencies and wideband imaging arrays where TTD is necessary. [ABSTRACT FROM PUBLISHER]

A true time delay shifter is fabricated in TSMC 65-nm CMOS low power technology for 24-GHz vehicle radar application. Its mechanism of source degenerated negative group delay compensation is proposed for flat group delay generation and tuning in a medium-wide 1.3-GHz instantaneous bandwidth, with simultaneously a reduced S21 of −6 ~ −9 dB (measured S21 excluding simulated extra insertion loss of packaging modeling and printed circuit board traces) compared to typical switched-line delay shifters. For 10-ps relative delay range, the variation is about 1–2 ps (max to 6 ps). For 17-ps range, the variation becomes 8–13 ps due to measurement issues. It consumes 16.3 mW at 1.2-V supply and 0.11-mm2 chip area. This topology is demonstrated to be a suitable and potential choice of delay shifter for medium-wideband time array system. [ABSTRACT FROM AUTHOR]

A high-power and a low-power fully integrated true-time-delay (TTD) phased-array receiver front-end have been developed for Ka-band applications using a 0.25-\mu\m SiGe:C BiCMOS technology. The high-power front-end, consisting of a high-power low-noise amplifier (LNA) and an active TTD phase shifter, achieves \13.8\pm \1.3~\dB gain and a noise figure (NF) below 3.1 dB at 30 GHz. The front-end provides 17.8-ps continuous variable delay, with 3.5% normalized delay variation (NDV) over a 22–37-GHz frequency span. The low-power front-end, composed of a low-power LNA and a passive TTD phase shifter, achieves \14.8\pm \3~\dB gain and an NF below 3.2 dB at 30 GHz. The low-power front-end offers 22-ps continuous variable delay with only 5.5% NDV over a 24–40-GHz frequency span. The low-power front-end consumes 22.5-mW power and presents an overall input 1-dB compression point ( P 1~{\rm{dB}}) and input third-order intercept point (IIP3) of -\22 and -\13.8 dBm, respectively. Depending on the linearity requirements, the high-power front-end can operate in dual-power modes. In the high-power (low-power) mode, the measured worst case input P 1~{\rm{dB}} and IIP3 are -\15.8 (-\18 dBm) and -\9 dBm (-\12 dBm) at 30 GHz with an averaged power consumption per channel of 269 mW (111 mW) for similar TTD and gain performance. The core area of the high-power and low-power front-ends are 0.31 and 0.48 \mm^2, respectively. [ABSTRACT FROM PUBLISHER]

In this paper, a miniaturized broadband dielectric spectroscopy system is presented for permittivity detection, chemical sensing, and mixture characterization for 1–8-GHz frequency range. A sensing capacitor exposed to the material under test (MUT) is part of a true time-delay (TTD) cell excited by a microwave signal at the sensing frequency of interest. The phase shift of the microwave signal at the output of the TTD cell compared to its input is a measure of the permittivity of MUTs. For wideband and accurate sensing, TTD cells are cascaded in a reconfigurable fashion to increase the detected phase shift, especially at low frequencies. TTD cells are designed to detect permittivities within the range of 1–30 considering nonideal effects, such as electromagnetic coupling between adjacent TTD cells. Calibration using reference liquids is applied to the fabricated sensor and sensor characteristics are extracted. Permittivity detection of organic chemicals is performed in the range of 1–8 GHz with an error less than 2%. The measured permittivities in the 1–8-GHz range are used to estimate the sub-1-GHz permittivities of MUTs using extrapolation. The sensing system is also used for mixture characterization to find the mixing ratios in binary mixtures with an accuracy of 1%. [ABSTRACT FROM AUTHOR]

Abstract-An analog RF microelectromechanical systems (MEMS) slotline true-time-delay (TTD) phase shifter is presented for use in conjunction with tapered slot antennas, such as the Vivaldfi aerial and the double exponentially tapered slot antenna. The design is a scalable distributed loaded-line cascade of 62 novel differential slow-wave unit cells. Each differential slow-wave unit cell comprises an electrically short slotline section, which is loaded with a shunt impedance consisting of two center-pulled contactless fixed-fixed beam RF MEMS varactors in series, sharing a common electrode. The analog RF MEMS slotline TTD phase shifter is demonstrated on a borosilicate glass wafer using a microfabrication process requiring six masks. It is designed for transistor-transistor logic bias voltage levels and exhibits a measured phase shift of 28.2° /dB (7.8 ps/dB) and 59.2°/cm at 10 GHz, maintaining a 75-Ω differential impedance match (S11dd < −15.8 dB). The input third-order intercept point is 5 dEm at 10 GHz for a Δf of 50 kHz, measured in a 100-Ω differential transmission line system. Design and fabrication opportunities, concerning distortion and loss reduction, as well as packaging, are highlighted. [ABSTRACT FROM AUTHOR]

A true time delay (TTD) beamforming system incorporating a wavelength tunable optical phase-lock loop (OPLL) module is proposed and experimentally demonstrated. In the proposed system, instead of using a high-frequency intensity modulator to modulate the optical carrier with an RF signal, we use two laser diodes (LDs) that are phase locked to generate an RF signal, which is then sent to a fiber Bragg grating (FBG) prism to produce different time delays. Since no optical intensity modulator is used, the system can operate at much higher frequencies with a reduced cost. In addition, the use of only two wavelengths eliminates the power-penalty problem caused by chromatic dispersion. In the proposed approach, the wavelengths from the two LDs are phase-locked using a frequency-discriminator-aided OPLL. A TTD beamforming system, using the OPLL in combination with an FBG prism to achieve tunable time delays, is investigated. Experimental time-delay results are provided. [ABSTRACT FROM PUBLISHER]

In this paper, design equations for true-time-delay microelectromechanical (MEM) phase shifters comprised of impedance-matched slow-wave unit cells are presented. The input to these equations requires only the specification of the maximum frequency of operation (fmax) and substrate dielectric constant (εr). The basis of the design methodology is to maximize the phase shift versus insertion loss performance. Experimental data for three 1-bit devices that are 11.44-mm long (fmax = 12 GHz), 4.6-mm long (fmax = 50 GHz), and 3.12-mm long (fmax = 110 GHz) shows a maximum phase deviation of 3% compared to predicted performance, with S11 less than -19 dB from 1 to 110 GHz. The worst case insertion loss is 0.9 dB for fmax = 12 GHz, 1.16 dB for fmax = 50 GHz, and 2.65 dB for fmax = 110 GHz. The MEM beams are actuated using high-resistance SiCr bias lines with typical actuation voltage around 30–45 V. [ABSTRACT FROM AUTHOR]

Weakly-coupled Space-Division-Multiplex (SDM) fiber is a promising candidate transmission medium for the remote true-time-delay (TTD) beamforming system. However, the signal-to-crosstalk beating interference (SCBI) can result in severe phase difference (or time delay) variation between TTD channels, which deteriorates the beam direction stability. Here, we develop a model to illustrate the phase variation problem when employing the coherent light source. To obtain a stable beam direction, we propose using an ASE source instead of a coherent source as the optical carrier. When utilizing the ASE source, the signal-to-noise ratio (SNR) of the remote RF signals is also thoroughly derived. It indicates that the RF signal with high SNR can be achieved via increasing the ASE source bandwidth and pre-compensating the fiber link dispersion. We carry out a proof-of-concept experiment of the remote beamforming system with the ASE source at the end. The variation of the phase difference between different channels is less than 3 °. The SNR of the RF signal is over 110 dB with a 1 Hz bandwidth. These results pave the way for exploring the SDM fiber in the remote beamforming system. [Display omitted] • The phase variation between TTD channels due to the SCBI in SDM fibers is modeled. • The SNR of the remote RF signal is derived thoroughly when using an ASE source. • Increasing the ASE source's BW and compensating the dispersion, high SNR is achieved. [ABSTRACT FROM AUTHOR]

Polarization maintaining fiber in a Sagnac interferometer is used to generate optical single sideband (OSSB) that can overcome the power penalty brought by optical double sideband modulation in fiber links. This OSSB modulation used in true time delay (TTD) can form digital TTD and overcome the power penalty. © 2007 Wiley Periodicals, Inc. Microwave Opt Technol Lett 49: 1492–1494, 2007; Published online in Wiley InterScience (www.interscience.wiley.com). DOI.10.1002/mop.22436 [ABSTRACT FROM AUTHOR]