Cite
Modeling Asymmetric Operation in Double-Gate Junctionless FETs by Means of Symmetric Devices.
MLA
Jazaeri, Farzan, et al. “Modeling Asymmetric Operation in Double-Gate Junctionless FETs by Means of Symmetric Devices.” IEEE Transactions on Electron Devices, vol. 61, no. 12, Dec. 2014, pp. 3962–70. EBSCOhost, https://doi.org/10.1109/TED.2014.2361358.
APA
Jazaeri, F., Barbut, L., & Sallese, J.-M. (2014). Modeling Asymmetric Operation in Double-Gate Junctionless FETs by Means of Symmetric Devices. IEEE Transactions on Electron Devices, 61(12), 3962–3970. https://doi.org/10.1109/TED.2014.2361358
Chicago
Jazaeri, Farzan, Lucian Barbut, and Jean-Michel Sallese. 2014. “Modeling Asymmetric Operation in Double-Gate Junctionless FETs by Means of Symmetric Devices.” IEEE Transactions on Electron Devices 61 (12): 3962–70. doi:10.1109/TED.2014.2361358.