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A Low Power Double-Sampling Extended Counting ADC With Class-AB OTA for Sensor Arrays.
- Source :
-
IEEE Transactions on Circuits & Systems. Part I: Regular Papers . Jan2015, Vol. 62 Issue 1, p29-38. 10p. - Publication Year :
- 2015
-
Abstract
- Due to its high resolution, small silicon area, and reasonable conversion rate, extended counting analog to digital conversion (EC-ADC) has become a competitive candidate for application in the readout circuits of high accuracy sensors. In this paper, an EC-ADC for large scale sensor arrays is proposed. At the system level, a double-sampling configuration for incremental \Sigma\Delta modulators is proposed. By applying this configuration, the clock frequency of EC-ADC can be almost halved for the same conversion accuracy and rate. At the circuit level, the contribution of class-AB operational transconductance amplifier (OTA) structure to the low power design is analyzed and a class-AB OTA applicable for EC-ADC is developed. The proposed architecture has been implemented using a commercial 0.18 \mum CMOS technology. Measured results show that a power consumption of less than 77 \muW can be achieved at the conversion rate of 51.2 Ksamples/s and 12.2-bit accuracy respectively. The converter core occupies 0.044 mm^2. [ABSTRACT FROM AUTHOR]
Details
- Language :
- English
- ISSN :
- 15498328
- Volume :
- 62
- Issue :
- 1
- Database :
- Academic Search Index
- Journal :
- IEEE Transactions on Circuits & Systems. Part I: Regular Papers
- Publication Type :
- Periodical
- Accession number :
- 100348610
- Full Text :
- https://doi.org/10.1109/TCSI.2014.2341117