Analysis and Design of a Precise Voltage Buffer.

An open loop voltage buffer with an exact unity gain using a positive local feedback technique with a conventional source follower is proposed. Stability of the buffer is determined by evaluating the location of the poles and zeros and its linearity is studied using Volterra series expansion. The proposed buffer is laid out in 0.35-μm standard CMOS technology. Post layout simulations demonstrate that the buffer gain is close to unity with less than 0.2% error. The power consumption is 10 mw from a 3.3 V power supply and the achieved total harmonic distortion is -78 dB for a 10 MHz input frequency. Also Monte-Carlo simulations are carried out to investigate effects of random mismatches on the circuit operation. [ABSTRACT FROM AUTHOR]