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Improvement of Thermal Environment by Thermoelectric Coolers and Numerical Optimization of Thermal Performance.
- Source :
-
IEEE Transactions on Electron Devices . Aug2015, Vol. 62 Issue 8, p2579-2586. 8p. - Publication Year :
- 2015
-
Abstract
- Seeking for an available thermal runaway solution is becoming one important and challenging issue in current nanometer ICs. Thermoelectric coolers (TECs) may give a solution. In this paper, a simplified power model of circuits closely associated with temperature with and without repeaters is derived. Based on the surface temperature difference and heat-flow density, an equivalent thermal resistance model for powered TECs is proposed. According to the thermal profile model, the steady-state temperature is calculated for the same chip with two different package forms. Finally, optimizations of p-n couples are performed with the purpose of obtaining the maximum coefficient of performance (COP) and minimum TECs power. As compared with the traditional flip-flop controlled-collapse-chip-connection package, the results reveal desirable conclusions that a 15.8% decrease of the chip stability temperature with the COP optimization at $I =2.5$ A and 11.4% steady-state power savings with the 13.2 W TEC power consumption are obtained in a 50-nm technology node. Analysis demonstrates that the maximum COP and minimum power consumed by TECs can be obtained at different optimum numbers of p-n couples, which is independent of electrical current across by TECs. [ABSTRACT FROM AUTHOR]
Details
- Language :
- English
- ISSN :
- 00189383
- Volume :
- 62
- Issue :
- 8
- Database :
- Academic Search Index
- Journal :
- IEEE Transactions on Electron Devices
- Publication Type :
- Academic Journal
- Accession number :
- 108535592
- Full Text :
- https://doi.org/10.1109/TED.2015.2442530