Performance analysis of a photonic integrated interferometer circuit based on silicon-on-insulator.

Small footprint photonic integrated interferometer based on silicon-on-insulator platform is reported. A passive interferometer comprising small footprint $$4\times 4$$ and $$2\times 2$$ multi-mode interference (MMI) couplers is designed and tested. The $$4\times 4 \,(2\times 2)$$ MMIs feature 0.16 dB (0.06 dB) excess loss, 0.22 dB (0.09 dB) power imbalance, and 1.7 $$^{\circ }$$ (0.12 $$^{\circ }$$ ) phase error. An efficient use of the small design area is accomplished by positioning the input and output ports of the passive interferometer along the same side of the chip with a separation of $$127\,\upmu \hbox {m}$$ between each other (pitch size). A passive-active interferometer terminated with Ge photodiodes has also been designed and tested. Sinusoidal fitting of the phase differences between output port number 1 and all other output ports are estimated to be under 2 $$^{\circ }$$ margin, i.e., $$90^{\circ }\pm 1^{\circ },180^{\circ }\pm 1^{\circ }$$ and $$270^{\circ }\pm 1^{\circ }$$ . [ABSTRACT FROM AUTHOR]