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Modeling STI Edge Parasitic Current for Accurate Circuit Simulations.
- Source :
-
IEEE Transactions on Computer-Aided Design of Integrated Circuits & Systems . Aug2015, Vol. 34 Issue 8, p1291-1294. 4p. - Publication Year :
- 2015
-
Abstract
- We enhance the capability of industry standard compact model BSIM6 to model the parasitic current $ I_{{\text {edge}}}$ at the shallow trench isolation edge. Accurate, efficient, and scalable model for $ I_{{\text {edge}}}$ is developed by finding the key differences between $ I_{{\text {edge}}}$ and main device drain current ( $ I_{{\text {main}}}$ ). It is found that $ I_{{\text {edge}}}$ has a different sub-threshold slope, body-bias coefficient, and short-channel behavior as compared to $ I_{{\text {main}}}$ . These important effects along with their dependencies on device geometry, bias conditions, and temperature are accounted for in the model. The model is in excellent agreement with experimental data verifying its scalability and readiness for production level usage. [ABSTRACT FROM PUBLISHER]
Details
- Language :
- English
- ISSN :
- 02780070
- Volume :
- 34
- Issue :
- 8
- Database :
- Academic Search Index
- Journal :
- IEEE Transactions on Computer-Aided Design of Integrated Circuits & Systems
- Publication Type :
- Academic Journal
- Accession number :
- 108597676
- Full Text :
- https://doi.org/10.1109/TCAD.2015.2419626