Scalable VLSI architectures for lattice structure-based discrete wavelet transform.

Authors :: Kim, Joon Tae
Lee, Yong Hoon
Source :: IEEE Transactions on Circuits & Systems Part II: Analog & Digital Signal Processing. Aug98, Vol. 45 Issue 8, p1031. 13p. 4 Black and White Photographs, 29 Diagrams, 2 Charts.
Publication Year :: 1998
Abstract: Highlights the development of a scalable VLSI architecture, with a two-channel quadrature mirror filter lattice, based on discrete wavelet transformation, in relation to digital signal processing. In-depth look at the data format converter's stucture; Discussion on data transfer; Characteristics of discrete wavelet transform; Information on discrete wavelet transform scheduling algorithms.

Subjects :: *DIGITAL signal processing
*DATA transmission systems
*ALGORITHMS

Language :: English
ISSN :: 10577130
Volume :: 45
Issue :: 8
Database :: Academic Search Index
Journal :: IEEE Transactions on Circuits & Systems Part II: Analog & Digital Signal Processing
Publication Type :: Academic Journal
Accession number :: 1093657
Full Text :: https://doi.org/10.1109/82.718811

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