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Common-Mode Voltage Reduction of Three-Level Four-Leg PWM Converter.
- Source :
-
IEEE Transactions on Industry Applications . Sep2015, Vol. 51 Issue 5, p4006-4016. 11p. - Publication Year :
- 2015
-
Abstract
- This paper presents a carrier-based pulsewidth modulation (PWM) method that reduces the common-mode voltage (CMV) of a three-level four-leg converter. Based on an analysis of space vector PWM (SVPWM) and sinusoidal-PWM switching patterns, the fourth-leg pole voltage of a three-phase converter, known as the “f pole voltage,” is manipulated to reduce the CMV. To synthesize the f pole voltage for the suppression of the CMV, positive and negative pole voltage references of the f leg are calculated. In addition, the offset voltage to prevent distortion of the a, b, and c phase voltages regarding the neutral point is deduced. The proposed PWM strategy can be easily implemented in the software of a DSP-based converter control. The three-level four-leg converter with the proposed PWM algorithm results in a remarkable reduction in the peak-to-peak value of the CMV. From the simulation and the experimental results, the peak-to-peak value of the CMV when using the proposed PWM method is 33% compared to that when using the SVPWM method, while the number of CMV transitions during the switching period in the proposed PWM method is only 25% of that when using the SVPWM method. [ABSTRACT FROM PUBLISHER]
Details
- Language :
- English
- ISSN :
- 00939994
- Volume :
- 51
- Issue :
- 5
- Database :
- Academic Search Index
- Journal :
- IEEE Transactions on Industry Applications
- Publication Type :
- Academic Journal
- Accession number :
- 109554632
- Full Text :
- https://doi.org/10.1109/TIA.2015.2422771