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3-D Resistive Memory Arrays: From Intrinsic Switching Behaviors to Optimization Guidelines.
- Source :
-
IEEE Transactions on Electron Devices . Oct2015, Vol. 62 Issue 10, p3160-3167. 8p. - Publication Year :
- 2015
-
Abstract
- 3-D resistive switching random access memory (RRAM) is a promising candidate for high-density nonvolatile memory applications, as well as for monolithic 3-D integration interleaved with logic layers. In this paper, we develop a methodology for assessing and optimizing large-scale 3-D RRAM arrays. A systematic study on the intrinsic switching behaviors and optimization of 3-D RRAM arrays is performed, combining device measurements and 3-D array simulations. The dependence of programming voltage on array size, cell location and pulse parameters, statistical properties of operating 3-D RRAM arrays, and subthreshold disturbance on RRAM cells is experimentally investigated. Optimization guidelines for the performance and reliability of 3-D RRAM arrays from device level to architecture level are presented: 1) an optimized 1/ $n$ architecture for 100-kb 3-D RRAM arrays can improve write margin by 69.6% and reduce energy consumption by 75.6% compared with a conventional full-size array design; 2) a strategy of prioritizing storage location for reliable operation is presented; and 3) an optimal hopping barrier of oxygen ions is found to improve array immunity to disturbance. [ABSTRACT FROM PUBLISHER]
Details
- Language :
- English
- ISSN :
- 00189383
- Volume :
- 62
- Issue :
- 10
- Database :
- Academic Search Index
- Journal :
- IEEE Transactions on Electron Devices
- Publication Type :
- Academic Journal
- Accession number :
- 109904202
- Full Text :
- https://doi.org/10.1109/TED.2015.2468602