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Novel Q-factor enhancement technique for on-chip spiral inductors and its application to cmos low-noise amplifier designs.
- Source :
-
Microwave & Optical Technology Letters . Dec2015, Vol. 57 Issue 12, p2883-2886. 4p. 1 Color Photograph, 2 Diagrams, 1 Chart, 3 Graphs. - Publication Year :
- 2015
-
Abstract
- ABSTRACT In this article, a novel Q-factor enhancement technique for on-chip spiral inductors is presented. Symmetric return ground structure in traditional on-chip spiral inductors is modified and shifted toward the side with stronger magnetic field caused by asymmetrical windings of inductors. In full-wave electro-magnetic simulation, it is observed that by applying this technique, inductor with higher Q-factor and larger inductance is obtained with no cost of additional chip area. Using the proposed technique, on-chip inductors are customized for a three-stage cascode low-noise amplifier (LNA) design. Fabricated in a commercial 65-nm CMOS process, the LNA features peak gain of 26.3 dB, 21.8 mW power consumption, noise figure of 5.3 dB, output P1 dB of −4 dBm, and core size of 0.15 mm2. In the comparison with prior arts, the proposed design achieves the highest gain and figure-of-merit. © 2015 Wiley Periodicals, Inc. Microwave Opt Technol Lett 57:2883-2886, 2015 [ABSTRACT FROM AUTHOR]
Details
- Language :
- English
- ISSN :
- 08952477
- Volume :
- 57
- Issue :
- 12
- Database :
- Academic Search Index
- Journal :
- Microwave & Optical Technology Letters
- Publication Type :
- Academic Journal
- Accession number :
- 109968532
- Full Text :
- https://doi.org/10.1002/mop.29453