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A 9.6 Gb/s 0.96 mW/Gb/s Forwarded Clock Receiver With High Jitter Tolerance Using Mixing Cell Integrated Injection-Locked Oscillator.

Authors :
Kim, Young-Ju
Chung, Sang-Hye
Ha, Kyung-Soo
Bae, Seung-Jun
Kim, Lee-Sup
Source :
IEEE Transactions on Circuits & Systems. Part I: Regular Papers. Oct2015, Vol. 62 Issue 10, p2495-2503. 9p.
Publication Year :
2015

Abstract

This paper presents a forwarded-clock receiver using a mixing cell integrated injection-locked oscillator (MIILO) and an I/Q generator based on injection-locked oscillator (IQGILO). By using MIILO, jitter tolerance is enhanced by about 1.8 times at high frequency compared to using a conventional injection-locked oscillator. In addition, the proposed receiver is robust against power supply induced jitter (PSIJ) caused by a clock distribution network because jitter tracking bandwidth of IQGILO is always lower than peak frequency of PSIJ regardless of latency mismatch between data and clock. The test chip achieves 9.6 Gb/s data rate with 0.96 mW/Gb/s and occupies only 0.0162 mm^2 in a 1 V 65 nm CMOS. [ABSTRACT FROM AUTHOR]

Details

Language :
English
ISSN :
15498328
Volume :
62
Issue :
10
Database :
Academic Search Index
Journal :
IEEE Transactions on Circuits & Systems. Part I: Regular Papers
Publication Type :
Periodical
Accession number :
109994068
Full Text :
https://doi.org/10.1109/TCSI.2015.2459557