A High Power Density Dynamic Voltage Scaling Enabling a Single-Inductor Four-Output Regulator Using a Power-Weighted CCM Controller and a Floating Capacitor-Based Output Filter.

This paper presents a dynamic voltage scaling (DVS) compatible single-inductor multiple-output (SIMO) voltage regulation module that enables smaller passives for a given output power, while maintaining power quality (low output ripple), suppressing cross regulation, and improving efficiency at high switching frequency. First, continuous-conduction mode (CCM) operation is utilized to deliver higher output power for a smaller inductance; the cross-regulation in CCM operation is suppressed using a novel power-weighted CCM controller. Second, a modified power stage filter is presented using floating capacitors that utilize the Miller effect to reduce the switching frequency of the output, while maintaining the power quality. The operating principles, stability, and circuit level design of the proposed SIMO VR are presented. The design is demonstrated through a 130-nm CMOS test chip that generates four outputs, each ranging from 200 to 600 mV, from a 1.2-V input. The measurements demonstrate a 20-MHz operation, the pulse width modulation signal of the power stage with 500-nH inductor, and 1-μF total load capacitance, while delivering a output power density of 150 mW/μH·μF. The test chip demonstrates DVS speed of 120 mV/μs, 73% peak efficiency at a load of 40 mA, and as high as 40% efficiency improvement using the modified power filer. [ABSTRACT FROM AUTHOR]