Effect of Si Interface Surface Roughness To The Tunneling Current of The Si/Si1-xGex/Si Heterojunction Bipolar Transistor.

In this work we discuss the surface roughness of Si interface impact to the tunneling current of the Si/Si1- xGex/Si heterojunction bipolar transistor. The Si interface surface roughness can be analyzed from electrical characteristics through the transversal electron velocity obtained as fitting parameter factor. The results showed that surface roughness increase as Ge content of virtual substrate increase This model can be used to investigate the effect of Ge content of the virtual substrate to the interface surface condition through current-voltage characteristic. [ABSTRACT FROM AUTHOR]