General Characterization Method and a Fast Load-Charge-Preserving Switching Procedure for the Stepwise Adiabatic Circuits.

An analytical method is presented to characterize stepwise adiabatic circuits (SACs). In this method, the SACs are modeled as a discrete time system. Unlike previous methods, the stability is verified for arbitrary load capacitor ratios. Moreover, this method presents analytical derivations to offer an area/energy efficient design methodology. MATLAB simulations, post-layout simulations in the CMOS 0.18 \mum technology, silicon measurements, and measurements based on discrete components confirm the precision of the analytical derivations. Using the proposed design methodology, a capacitive tank has been designed which reduces the energy consumption by 20% while the total size of the tank capacitors is smaller than 0.4CL. Additionally, a new switching procedure for the SACs is presented. This procedure stabilizes the voltage levels without reverse switching, unlike previously reported methods. Thus preserving the energy efficiency, it improves the speed by a factor of up to two, since the tank recycles its charge inherently. Moreover, the capacitive load can retain its charge after the charging process and let the tank charges another load capacitor. As a result, the proposed switching procedure can be used in multi-cycle circuits such as the capacitive DAC of a SAR ADC in which the load capacitor must hold its charge after charging process is finished. [ABSTRACT FROM PUBLISHER]