Cite
Full-Chip Power Supply Noise Time-Domain Numerical Modeling and Analysis for Single and Stacked ICs.
MLA
Zheng, Li, et al. “Full-Chip Power Supply Noise Time-Domain Numerical Modeling and Analysis for Single and Stacked ICs.” IEEE Transactions on Electron Devices, vol. 63, no. 3, Mar. 2016, pp. 1225–31. EBSCOhost, https://doi.org/10.1109/TED.2016.2521362.
APA
Zheng, L., Zhang, Y., & Bakir, M. S. (2016). Full-Chip Power Supply Noise Time-Domain Numerical Modeling and Analysis for Single and Stacked ICs. IEEE Transactions on Electron Devices, 63(3), 1225–1231. https://doi.org/10.1109/TED.2016.2521362
Chicago
Zheng, Li, Yang Zhang, and Muhannad S. Bakir. 2016. “Full-Chip Power Supply Noise Time-Domain Numerical Modeling and Analysis for Single and Stacked ICs.” IEEE Transactions on Electron Devices 63 (3): 1225–31. doi:10.1109/TED.2016.2521362.