Trapping and reliability issues in GaN-based MIS HEMTs with partially recessed gate.

This paper reports an extensive analysis of the trapping and reliability issues in AlGaN/GaN metal insulator semiconductor (MIS) high electron mobility transistors (HEMTs). The study was carried out on three sets of devices with different gate insulators, namely PEALD SiN, RTCVD SiN and ALD Al 2 O 3 . Based on combined dc, pulsed and transient measurements we demonstrate the following: (i) the material/deposition technique used for the gate dielectric can significantly influence the main dc parameters (threshold current, subthreshold slope, gate leakage) and the current collapse; and (ii) current collapse is mainly due to a threshold voltage shift, which is ascribed to the trapping of electrons at the gate insulator and/or at the AlGaN/insulator interface. The threshold voltage shift (induced by a given quiescent bias) is directly correlated to the leakage current injected from the gate; this demonstrates the importance of reducing gate leakage for improving the dynamic performance of the devices. (iii) Frequency-dependent capacitance–voltage (C–V) measurements demonstrate that optimized dielectric allow to lower the threshold-voltage hysteresis, the frequency dependent capacitance dispersion, and the conductive losses under forward-bias. (iv) The material/deposition technique has a significant impact on device robustness against gate positive bias stress. Time to failure is Weibull-distributed with a beta factor not significantly influenced by the properties of the gate insulator. The results presented within this paper provide an up-to-date overview of the main advantages and limitations of GaN-based MIS HEMTs for power applications, on the related characterization techniques and on the possible strategies for improving device performance and reliability. [ABSTRACT FROM AUTHOR]