Cite
Ternary cyclic redundancy check by a new hardware-friendly ternary operator.
MLA
Sam Daliri, Mahya, et al. “Ternary Cyclic Redundancy Check by a New Hardware-Friendly Ternary Operator.” Microelectronics Journal, vol. 54, Aug. 2016, pp. 126–37. EBSCOhost, https://doi.org/10.1016/j.mejo.2016.04.018.
APA
Sam Daliri, M., Faghih Mirzaee, R., Navi, K., & Bagherzadeh, N. (2016). Ternary cyclic redundancy check by a new hardware-friendly ternary operator. Microelectronics Journal, 54, 126–137. https://doi.org/10.1016/j.mejo.2016.04.018
Chicago
Sam Daliri, Mahya, Reza Faghih Mirzaee, Keivan Navi, and Nader Bagherzadeh. 2016. “Ternary Cyclic Redundancy Check by a New Hardware-Friendly Ternary Operator.” Microelectronics Journal 54 (August): 126–37. doi:10.1016/j.mejo.2016.04.018.