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Compact Modeling of Surface Potential, Charge, and Current in Nanoscale Transistors Under Quasi-Ballistic Regime.

Authors :
Dasgupta, Avirup
Agarwal, Amit
Khandelwal, Sourabh
Chauhan, Yogesh Singh
Source :
IEEE Transactions on Electron Devices. Nov2016, Vol. 63 Issue 11, p4151-4159. 9p.
Publication Year :
2016

Abstract

In this paper, we have proposed a new analytical model for FETs working in the quasi-ballistic regime. The model is based on a calculation of the charge density along the channel which is then used to solve Poisson’s equation to get the variation of the channel potential. This is then used to calculate the ballistic and drift-diffusive components of the current. The model is capable of accurately predicting the terminal $I$ – $V$ characteristics for all drain and gate biases and includes short-channel effects. It takes length scaling into account and can be used for the full range of devices starting from complete drift diffusive to completely ballistic. The model has been verified with data for high electron mobility transistors (degenerate) and common multigate and nanowire FETs (nondegenerate) proving its ability to take different geometries into consideration. It can be easily implemented as a compact model and used for SPICE circuit simulations. [ABSTRACT FROM AUTHOR]

Details

Language :
English
ISSN :
00189383
Volume :
63
Issue :
11
Database :
Academic Search Index
Journal :
IEEE Transactions on Electron Devices
Publication Type :
Academic Journal
Accession number :
119032696
Full Text :
https://doi.org/10.1109/TED.2016.2603540