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On Optimization-Based ATPG and Its Application for Highly Compacted Test Sets.
- Source :
-
IEEE Transactions on Computer-Aided Design of Integrated Circuits & Systems . Dec2016, Vol. 35 Issue 12, p2104-2117. 14p. - Publication Year :
- 2016
-
Abstract
- Test compaction is an important aspect in the post-production test since it is able to reduce the test data and the test costs, respectively. Current automatic test pattern generation (ATPG) methods treat all faults independently from each other which limits the test compaction capability. We propose a new optimization satisfiability (SAT)-based ATPG for compact test set generation with high fault coverage as well as a new retargeting stage for test set reduction. The ATPG is based on a novel multiple-target test generation formulation using optimization techniques. Robust SAT-based solving algorithms are leveraged to determine compatible fault groups which can be detected by the same test. The proposed technique can be used during initial compact test generation as well as a post-process to increase the compactness of existing test sets, e.g., generated by commercial tools, in an iterative manner. Experimental results show that the proposed SAT-based approach is able to produce highly compacted test sets with high fault coverage for stuck-at as well as transition faults. The approach is able to produce lower pattern counts than a commercial ATPG tool. For one industrial circuit, the test set size can even be reduced down to 26% of the size generated by a commercial ATPG tool. [ABSTRACT FROM PUBLISHER]
Details
- Language :
- English
- ISSN :
- 02780070
- Volume :
- 35
- Issue :
- 12
- Database :
- Academic Search Index
- Journal :
- IEEE Transactions on Computer-Aided Design of Integrated Circuits & Systems
- Publication Type :
- Academic Journal
- Accession number :
- 119616502
- Full Text :
- https://doi.org/10.1109/TCAD.2016.2552822