A Low-cost 4 Bit, 10 Giga-samples-per-second Analog-to-digital Converter Printed Circuit Board Assembly for FPGA-based Backends.

MLA

Homin Jiang, et al. “A Low-Cost 4 Bit, 10 Giga-Samples-per-Second Analog-to-Digital Converter Printed Circuit Board Assembly for FPGA-Based Backends.” Publications of the Astronomical Society of the Pacific, vol. 128, no. 969, Nov. 2016, p. 1. EBSCOhost, https://doi.org/10.1088/1538-3873/128/969/115002.

APA

Homin Jiang, Chen-Yu Yu, Derek Kubo, Ming-Tang Chen, & Kim Guzzino. (2016). A Low-cost 4 Bit, 10 Giga-samples-per-second Analog-to-digital Converter Printed Circuit Board Assembly for FPGA-based Backends. Publications of the Astronomical Society of the Pacific, 128(969), 1. https://doi.org/10.1088/1538-3873/128/969/115002

Chicago

Homin Jiang, Chen-Yu Yu, Derek Kubo, Ming-Tang Chen, and Kim Guzzino. 2016. “A Low-Cost 4 Bit, 10 Giga-Samples-per-Second Analog-to-Digital Converter Printed Circuit Board Assembly for FPGA-Based Backends.” Publications of the Astronomical Society of the Pacific 128 (969): 1. doi:10.1088/1538-3873/128/969/115002.