A 1.2V-to-0.4V 3.2GHz-to-14.3MHz Power-Efficient 3-Port Register File in 65-nm CMOS.

MLA

Sarfraz, Khawar, and Mansun Chan. “A 1.2V-to-0.4V 3.2GHz-to-14.3MHz Power-Efficient 3-Port Register File in 65-Nm CMOS.” IEEE Transactions on Circuits & Systems. Part I: Regular Papers, vol. 64, no. 2, Feb. 2017, pp. 360–72. EBSCOhost, https://doi.org/10.1109/TCSI.2016.2613282.

APA

Sarfraz, K., & Chan, M. (2017). A 1.2V-to-0.4V 3.2GHz-to-14.3MHz Power-Efficient 3-Port Register File in 65-nm CMOS. IEEE Transactions on Circuits & Systems. Part I: Regular Papers, 64(2), 360–372. https://doi.org/10.1109/TCSI.2016.2613282

Chicago

Sarfraz, Khawar, and Mansun Chan. 2017. “A 1.2V-to-0.4V 3.2GHz-to-14.3MHz Power-Efficient 3-Port Register File in 65-Nm CMOS.” IEEE Transactions on Circuits & Systems. Part I: Regular Papers 64 (2): 360–72. doi:10.1109/TCSI.2016.2613282.