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Design of a fast response time single-phase PLL with dc offset rejection capability.
- Source :
-
Electric Power Systems Research . Apr2017, Vol. 145, p35-43. 9p. - Publication Year :
- 2017
-
Abstract
- Second-order generalized integrator (SOGI) based phase-locked loops (PLLs) are commonly used for grid voltage synchronization in single-phase grid-connected power converters. SOGI-PLLs are attractive because of their simple structure that makes them suitable for implementation even in low-end digital controllers. In this paper, an SOGI based fixed-parameter PLL structure with full dc offset rejection capability is presented. This PLL uses two cascaded SOGI structures and it is termed as cascaded generalized integrator PLL (CGI-PLL). A systematic design procedure is proposed for the CGI-PLL that minimizes the response time and unit vector harmonic distortion. This design achieves minimum settling time for any given worst-case frequency deviation in the grid voltage and ensures that the unit vector THD is less than 1%. The PLL designed using the proposed method has good harmonic attenuation capability. The steady-state and transient response of this PLL have been validated experimentally and are found to agree with the theoretical analysis. [ABSTRACT FROM AUTHOR]
Details
- Language :
- English
- ISSN :
- 03787796
- Volume :
- 145
- Database :
- Academic Search Index
- Journal :
- Electric Power Systems Research
- Publication Type :
- Academic Journal
- Accession number :
- 121242271
- Full Text :
- https://doi.org/10.1016/j.epsr.2016.12.023