Cite
The impact of interface and border traps on current-voltage, capacitance-voltage, and split-CV mobility measurements in InGaAs MOSFETs.
MLA
Pavan, Paolo, et al. “The Impact of Interface and Border Traps on Current-Voltage, Capacitance-Voltage, and Split-CV Mobility Measurements in InGaAs MOSFETs.” Physica Status Solidi. A: Applications & Materials Science, vol. 214, no. 3, Mar. 2017, p. n/a-N.PAG. EBSCOhost, https://doi.org/10.1002/pssa.201600592.
APA
Pavan, P., Zagni, N., Puglisi, F. M., Alian, A., Thean, A. V., Collaert, N., & Verzellesi, G. (2017). The impact of interface and border traps on current-voltage, capacitance-voltage, and split-CV mobility measurements in InGaAs MOSFETs. Physica Status Solidi. A: Applications & Materials Science, 214(3), n/a-N.PAG. https://doi.org/10.1002/pssa.201600592
Chicago
Pavan, Paolo, Nicolò Zagni, Francesco Maria Puglisi, Alireza Alian, Aaron Voon‐Yew Thean, Nadine Collaert, and Giovanni Verzellesi. 2017. “The Impact of Interface and Border Traps on Current-Voltage, Capacitance-Voltage, and Split-CV Mobility Measurements in InGaAs MOSFETs.” Physica Status Solidi. A: Applications & Materials Science 214 (3): n/a-N.PAG. doi:10.1002/pssa.201600592.