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Output-Capacitor-Free LDO Design Methodologies for High EMI Immunity.
- Source :
-
IEEE Transactions on Electromagnetic Compatibility . Apr2018, Vol. 60 Issue 2, p497-506. 10p. - Publication Year :
- 2018
-
Abstract
- This paper presents circuit design methodologies to enhance the electromagnetic immunity of an output-capacitor-free low-dropout (LDO) regulator. To evaluate the noise performance of an LDO regulator in the small-signal domain, power-supply rejection (PSR) is used. We optimize a bandgap reference circuit for optimum dc PSR, and propose a capacitor cancelation technique circuit for bandwidth compensation, and a low-noise biasing circuit for immunity enhancement in the bias circuit. For large-signal, transient performance enhancement, we suggest using a unity-gain amplifier to minimize the voltage difference of the differential inputs of the error amplifier, and an auxiliary N-channel metal oxide semiconductor (NMOS) pass transistor was used to maintain a stable gate voltage in the pass transistor. The effectiveness of the design methodologies proposed in this paper is verified using circuit simulations using an LDO regulator designed by 0.18-$\mu$m CMOS process. When sine and pulse signals are applied to the input, the worst dc offset variations were enhanced from 36% to 16% and from 31.7% to 9.7%, respectively, as compared with those of the conventional LDO. We evaluated the noise performance versus the conducted electromagnetic interference generated by the dc–dc converter; the noise reduction level was significantly improved. [ABSTRACT FROM PUBLISHER]
Details
- Language :
- English
- ISSN :
- 00189375
- Volume :
- 60
- Issue :
- 2
- Database :
- Academic Search Index
- Journal :
- IEEE Transactions on Electromagnetic Compatibility
- Publication Type :
- Academic Journal
- Accession number :
- 126112253
- Full Text :
- https://doi.org/10.1109/TEMC.2017.2727047