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Low-leakage sub-threshold 9 T-SRAM cell in 14-nm FinFET technology.
- Source :
-
International Journal of Circuit Theory & Applications . Nov2017, Vol. 45 Issue 11, p1647-1659. 13p. - Publication Year :
- 2017
-
Abstract
- A novel sub-threshold 9 T Static Random Access Memory (SRAM) cell designed and simulated in 14-nm FinFET technology is proposed in this paper. The proposed 9 T-SRAM cell offers an improved access time in comparison to the 8 T-SRAM cell. Furthermore, an assist circuit is proposed by which the leakage current of the proposed SRAM cell is reduced by 20% when holding '0' and an equal leakage current during hold '1' in comparison to the 8 T-SRAM cell. The proposed circuit improves the access time by 40% in comparison to the 8 T-SRAM cell without any degradation in write and read noise margins, as well. The maximum operating frequency of the proposed SRAM cell is 1.53 MHz at VDD = 270 mV. Copyright © 2016 John Wiley & Sons, Ltd. [ABSTRACT FROM AUTHOR]
Details
- Language :
- English
- ISSN :
- 00989886
- Volume :
- 45
- Issue :
- 11
- Database :
- Academic Search Index
- Journal :
- International Journal of Circuit Theory & Applications
- Publication Type :
- Academic Journal
- Accession number :
- 126316060
- Full Text :
- https://doi.org/10.1002/cta.2280