Design Procedure and Selection of TIQ Comparators for Flash ADCs.

In this work, we propose a novel procedure to generate and select threshold inverter quantized (TIQ) comparators for TIQ Flash ADCs. The new procedure generates more TIQ comparators than the procedure designed by Lee , Yoo, and Choi (LYC) (Proceedings of International Symposium on Quality Electronic Design, 2002). Two 6-bit TIQ Flash ADCs were designed, the LYC flash ADC, which selects its TIQ comparators using the current threshold selection algorithm, and the AC TIQ Flash ADC, which selects its TIQ comparators using the threshold selection algorithm proposed herein. Both ADCs were designed in $$0.5\,{\upmu }\hbox {m}$$ CMOS technology and compared against the process, voltage source, and temperature (PVT) variations. Proposed TIQ selection procedure allows the designer to select the optimum TIQ set for desired ADC. AC ADC has a DNL values ±0.015 LSB and INL values between $$\pm 0.0225$$ compared to ±0.1 LSB and 0.3 to −0.1 LSB for DNL and INL values of the LYC ADC. ENOB and SNDR for the AC were improved by at least $$31.3\%$$ compared to LYC ADC, at typical process settings. For process, voltage source, and temperature (PVT) variations, in overall the AC ADC has at least better the DNL values by at least $$22.5\%$$ and reduced INL values by at least $$35\%$$ . Over PVT variation, AC ADC has maintained ENOB value greater than 5.3 bits for all 16 variation corners. ENOB was improved by at least 1.5 bits over all corners. SNDR and SFDR were increased by at least 4 dB over the PVT corners. Proposed AC procedure shows scalability feature by generating extra threshold points for the $$65\hbox {-nm}$$ TIQ comparators. [ABSTRACT FROM AUTHOR]