Design considerations for novel device architecture: hetero-material double-gate (HEM-DG) MOSFET with sub-100 nm gate length

The paper presents the results of a systematic analytical characterization, supplemented by 2D device simulation, applied to novel device architecture: hetero-material double-gate (HEM-DG) MOSFET with effective channel length down to 30 nm. A new approach to explain the pertinent device physics is presented, which can facilitate device design and technology selection for enhanced performance. Numerical device simulation data, obtained using 2D device simulator: ATLAS, for threshold voltage, drain induced barrier lowering (DIBL) and subthreshold swing (<f>S</f>) were compared to the model to validate the analytical formulation. The comparison of symmetric DG (SDG) MOSFET and HEM-DG MOSFET configurations demonstrated superiority of HEM-DG MOSFET: ideal <f>S</f> and reduced DIBL. Comparison with simulated results reveals excellent quantitative agreement. [Copyright &y& Elsevier]