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Vertical Transistor With n-Bridge and Body on Gate for Low-Power 1T-DRAM Application.

Authors :
Jyi-Tsong Lin
Hung-Hsiu Lin
Yi-Jie Chen
Cyuan-You Yu
Kranti, Abhinav
Chih-Chia Lin
Wei-Han Lee
Source :
IEEE Transactions on Electron Devices. Dec2017, Vol. 64 Issue 12, p4937-4945. 9p.
Publication Year :
2017

Abstract

In this paper, we propose a vertical transistor with n-bridge and body on gate (BOG-DRAM) for Low-power 1T-DRAM application. The vertical channel of the device can reduce the short-channel effect and improve scalability. The storage region stacked on the gate leads to the efficient utilization of storage space. The device with junctionless channel layers on three sides can improve writing time. The conventional current bridge device only has one side gatecontrol depletion region, but the proposed BOG-DRAM has triple-side gate-control depletion region which can improve programming window at shorter gate lengths. BOG-DRAM achieves programming window of 33.6 μA/μm when the storage length is 20 nm. In addition, the work function offset is exploited for low-power application. [ABSTRACT FROM AUTHOR]

Details

Language :
English
ISSN :
00189383
Volume :
64
Issue :
12
Database :
Academic Search Index
Journal :
IEEE Transactions on Electron Devices
Publication Type :
Academic Journal
Accession number :
127950454
Full Text :
https://doi.org/10.1109/TED.2017.2766563