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JFETIDG: A Compact Model for Independent Dual-Gate JFETs With Junction or MOS Gates.
- Source :
-
IEEE Transactions on Electron Devices . Feb2018, Vol. 65 Issue 2, p747-755. 9p. - Publication Year :
- 2018
-
Abstract
- This paper presents the details of JFETIDG, a compact model for independent dual-gate junction field-effect transistors with any combination of p-n junction or MOS gates. JFETIDG accounts for nonlinearity from depletion pinching, velocity saturation, and self-heating, and includes extensive modeling of geometry and temperature dependences, parasitics, noise, and statistical variations. We also demonstrate that it accurately models long channel junctionlessMOS transistors. Themodel is verified by comparison with TCAD simulations and experimental data. Verilog-A code for JFETIDG is available in the public domain. [ABSTRACT FROM AUTHOR]
Details
- Language :
- English
- ISSN :
- 00189383
- Volume :
- 65
- Issue :
- 2
- Database :
- Academic Search Index
- Journal :
- IEEE Transactions on Electron Devices
- Publication Type :
- Academic Journal
- Accession number :
- 128703220
- Full Text :
- https://doi.org/10.1109/TED.2017.2786043