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A High-Performance Gate Engineered InGaN Dopingless Tunnel FET.

Authors :
Xiaoling Duan
Jincheng Zhang
Shulong Wang
Yao Li
Shengrui Xu
Yue Hao
Source :
IEEE Transactions on Electron Devices. Mar2018, Vol. 65 Issue 3, p1223-1229. 7p.
Publication Year :
2018

Abstract

A gate engineered InGaN dopingless tunnel FET (DL-TFET) using the charge plasma concept is proposed and investigated by silvaco Atlas simulation. In0.75Ga0.25N is a direct gap semiconductor, and the effective tunneling mass of electron and hole is smaller than that of silicon, which induces that the drain current and average subthreshold swing (SSavg) of InGaN DL-TFET improve 1.3 x 10² times and 51.1% than that of Si DL-TFET at the overdrive voltage of 0.5 V, respectively. What is more, better device performances are achieved by gate engineering with appropriate "In" fraction, proper space between the gate and source (Lgs), and appropriate tunneling gate work function (ΦTG). The direct-current, RF, and energy-efficient performance studies show that SSavg of 7.9 mV/dec, an on-state current (ION) of 8.02 x 10-5 A/µm, a cutoff frequency (fT) of 119 GHz, and an energy delay product of 0.64 fJ-ps/µm can be obtained in the proposed TFET. This paper indicates that the gate engineered InGaN DL-TFET is a promising TFET for low-power RF and digital logic applications. [ABSTRACT FROM AUTHOR]

Details

Language :
English
ISSN :
00189383
Volume :
65
Issue :
3
Database :
Academic Search Index
Journal :
IEEE Transactions on Electron Devices
Publication Type :
Academic Journal
Accession number :
128703278
Full Text :
https://doi.org/10.1109/TED.2018.2796848