Cite
Laminated process effect of high-density redistributed trace lines on the risk estimation of induced-stress failure for 3D-IC embedded interposer.
MLA
Lee, Chang-Chun, et al. “Laminated Process Effect of High-Density Redistributed Trace Lines on the Risk Estimation of Induced-Stress Failure for 3D-IC Embedded Interposer.” Microsystem Technologies, vol. 25, no. 5, May 2019, pp. 2021–28. EBSCOhost, https://doi.org/10.1007/s00542-017-3638-8.
APA
Lee, C.-C., Huang, P.-C., He, J.-Y., & Chuang, J.-C. (2019). Laminated process effect of high-density redistributed trace lines on the risk estimation of induced-stress failure for 3D-IC embedded interposer. Microsystem Technologies, 25(5), 2021–2028. https://doi.org/10.1007/s00542-017-3638-8
Chicago
Lee, Chang-Chun, Pei-Chen Huang, Jing-Yan He, and Jui-Chang Chuang. 2019. “Laminated Process Effect of High-Density Redistributed Trace Lines on the Risk Estimation of Induced-Stress Failure for 3D-IC Embedded Interposer.” Microsystem Technologies 25 (5): 2021–28. doi:10.1007/s00542-017-3638-8.