Redundant-Signed-Digit-Based High Speed Elliptic Curve Cryptographic Processor.

MLA

Shah, Yasir A., et al. “Redundant-Signed-Digit-Based High Speed Elliptic Curve Cryptographic Processor.” Journal of Circuits, Systems & Computers, vol. 28, no. 5, May 2019, p. N.PAG. EBSCOhost, https://doi.org/10.1142/S0218126619500816.

APA

Shah, Y. A., Javeed, K., Azmat, S., & Wang, X. (2019). Redundant-Signed-Digit-Based High Speed Elliptic Curve Cryptographic Processor. Journal of Circuits, Systems & Computers, 28(5), N.PAG. https://doi.org/10.1142/S0218126619500816

Chicago

Shah, Yasir A., Khalid Javeed, Shoaib Azmat, and Xiaojun Wang. 2019. “Redundant-Signed-Digit-Based High Speed Elliptic Curve Cryptographic Processor.” Journal of Circuits, Systems & Computers 28 (5): N.PAG. doi:10.1142/S0218126619500816.