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Gate-Lifted nMOS ESD Protection Device Triggered by a p-n-p in Series With a Diode.

Authors :
Lai, Da-Wei
Sque, Stephen
Peters, Wim
Smedes, Theo
Source :
IEEE Transactions on Electron Devices. Apr2019, Vol. 66 Issue 4, p1642-1647. 6p.
Publication Year :
2019

Abstract

We demonstrate a gate-lifted nMOS electrostatic discharge (ESD) protection device triggered by a p-n-p in series with a diode in a 0.18- $\mu \text{m}$ bulk CMOS technology for 5-V mobile applications up to 85 °C. This voltage-triggering scheme is suitable for fail-safe, open-drain, supply, and surge protections. In addition, the robust ESD performance is boosted by parasitic embedded-silicon-controlled-rectifier action in the high-current regime. No extra masks nor additional RC control circuitry are required for this implementation. [ABSTRACT FROM AUTHOR]

Details

Language :
English
ISSN :
00189383
Volume :
66
Issue :
4
Database :
Academic Search Index
Journal :
IEEE Transactions on Electron Devices
Publication Type :
Academic Journal
Accession number :
136509830
Full Text :
https://doi.org/10.1109/TED.2019.2899457